External direct memory access of embedded controller memory
View Patent ↗An embedded controller capable of providing direct memory access (DMA) to memory for a host. The controller may include a processor, a memory medium, and an interface coupled to the memory medium. The interface may be configured to couple to a host and receive a DMA request. The DMA request may include a request to read data from a memory location in the memory medium or a request to write data to a memory location in the memory medium. The DMA request may include a relative memory address. The interface may be configured to translate the relative memory address into a first address of the memory medium. Accordingly, the interface may perform operations according to the DMA request using the first address of the memory medium. The processor may be configured to operate according to data stored in the memory medium.
1. An embedded controller, comprising:
a processor;
a memory medium coupled to the processor; and
an interface coupled to the memory medium, wherein the interface is configured to:
couple to a host;
receive a direct memory access (DMA) request from the host, wherein the DMA request comprises a request to read data from a memory location in the memory medium or a request to write data to a memory location in the memory medium, and wherein the DMA request comprises a relative memory address;
translate the relative memory address into a first address of the memory medium;
perform operations according to the DMA request using the first address of the memory medium;
receive a second DMA request from the host, wherein the second DMA request does not comprise a relative memory address;
automatically increment the first address of the memory medium or automatically increment the relative memory address, wherein said automatically incrementing is performed in response to receiving the second DMA request
perform operations according to the second DMA request using the automatically determined address of the memory medium;
wherein the processor is configured to operate according to data stored in the memory medium.
2. The embedded controller of claim 1 , wherein the interface is configured to translate relative memory addresses into addresses of a plurality of discontinuous regions of the memory medium.
3. The embedded controller of claim 2 , wherein the interface is configured to provide read only access to a first region of the memory medium and read and write access to a second region of the memory medium.
4. The embedded controller of claim 2 , wherein the interface is configured to provide read only access to a first portion of a first region of the memory medium and read and write access to a second portion of the first region.
5. The embedded controller of claim 1 , wherein the interface is configured to provide memory protection of the memory medium in translating the relative memory address to the first address of the memory medium.
6. The embedded controller of claim 4 , wherein said providing memory protection comprises using base limit memory protection.
7. A method for processing a direct memory access (DMA) request, comprising:
receiving a DMA request from a host, wherein the DMA request comprises a request to read data from a memory location in a memory medium or a request to write data to a memory location in the memory medium, and wherein the DMA request comprises a relative memory address;
translating the relative memory address into a first address of the memory medium;
performing operations according to the DMA request using the first address of the memory medium;
receiving a second DMA request from the host, wherein the second DMA request does not comprise a relative memory address;
automatically incrementing the first address of the memory medium or the relative memory address, wherein said automatically incrementing is performed in response to receiving the second DMA request
performing operations according to the second DMA request using the automatically incremented address of the memory medium.
8. The method of claim 7 , wherein said receiving, said translating, and said performing is performed by an embedded controller.
9. The method of claim 7 , wherein said translating comprises:
selecting a first region from a plurality of discontinuous regions of the memory medium.
10. The method of claim 9 , wherein the first region is a read only region of the memory medium, relative to the DMA request.
11. The method of claim 9 , wherein the first region is a read and write region of the memory medium, relative to the DMA request.
12. The method of claim 9 , wherein the first region comprises a read only portion and a read and write portion.
13. The method of claim 9 , wherein said translating comprises providing memory protection of the memory medium.
14. The method of claim 13 , wherein said providing memory protection comprises using base limit memory protection.
15. An embedded controller, comprising:
a processor;
a memory medium coupled to the processor; and
an interface coupled to the memory medium, wherein the interface is configured to:
couple to a host;
receive a direct memory access (DMA) request from the host, wherein the DMA request comprises a request to read data from a memory location in the memory medium or a request to write data to a memory location in the memory medium, and wherein the DMA request comprises a relative memory address;
translate the relative memory address into addresses of a plurality of discontinuous regions of the memory medium;
provide memory protection by providing read only access to a first portion of a first region of the memory medium and read and write access to a second portion of the first region, wherein said providing memory protection comprises using base limit memory protection;
perform operations according to the DMA request using the addresses of the plurality of discontinuous regions of the memory medium;
wherein the processor is configured to operate according to data stored in the memory medium.
16. A method for processing a direct memory access (DMA) request, comprising:
receiving a DMA request from a host, wherein the DMA request comprises a request to read data from a memory location in a memory medium or a request to write data to a memory location in the memory medium, and wherein the DMA request comprises a relative memory address;
translating the relative memory address into a first address of the memory medium, wherein said translating comprises providing memory protection of the memory medium, wherein said providing memory protection comprises using base limit memory protection;
performing operations according to the DMA request using the first address of the memory medium.
17. An embedded controller, comprising:
a processor;
a memory medium coupled to the processor; and
an interface coupled to the memory medium, wherein the interface is configured to:
couple to a host;
receive a direct memory access (DMA) request from the host, wherein the DMA request comprises a request to read data from a memory location in the memory medium or a request to write data to a memory location in the memory medium, and wherein the DMA request comprises a relative memory address;
translate the relative memory address into a first address of the memory medium, wherein said translating comprises providing memory protection of the memory medium, wherein said providing memory protection comprises using base limit memory protection;
perform operations according to the DMA request using the first address of the memory medium;
wherein the processor is configured to operate according to data stored in the memory medium.
18. An embedded controller, comprising:
a processor;
a memory medium coupled to the processor; and
an interface coupled to the memory medium, wherein the interface is configured to:
couple to a host;
receive a memory access (MA) request from the host, wherein the MA request comprises a request to read data from a memory location in the memory medium or a request to write data to a memory location in the memory medium, and wherein the MA request comprises a relative memory address;
translate the relative memory address into a first address of the memory medium;
perform operations according to the MA request using the first address of the memory medium;
receive a second MA request from the host, wherein the second MA request does not comprise a relative memory address;
automatically increment the first address of the memory medium or automatically increment the relative memory address, wherein said automatically incrementing is performed in response to receiving the second MA request
perform operations according to the second MA request using the automatically determined address of the memory medium;
wherein the processor is configured to operate according to data stored in the memory medium.
19. An embedded controller, comprising:
a processor;
a memory medium coupled to the processor; and
an interface coupled to the memory medium, wherein the interface is configured to:
couple to a host;
receive a memory access (MA) request from the host, wherein the MA request comprises a request to read data from a memory location in the memory medium or a request to write data to a memory location in the memory medium, and wherein the MA request comprises a relative memory address;
translate the relative memory address into addresses of a plurality of discontinuous regions of the memory medium;
provide memory protection by providing read only access to a first portion of a first region of the memory medium and read and write access to a second portion of the first region, wherein said providing memory protection comprises using base limit memory protection;
perform operations according to the MA request using the addresses of the plurality of discontinuous regions of the memory medium;
wherein the processor is configured to operate according to data stored in the memory medium.
20. A method for processing a memory access (MA) request, comprising:
receiving an MA request from a host, wherein the MA request comprises a request to read data from a memory location in a memory medium or a request to write data to a memory location in the memory medium, and wherein the MA request comprises a relative memory address;
translating the relative memory address into a first address of the memory medium;
performing operations according to the MA request using the first address of the memory medium, wherein said performing operations is not performed by the host;
receiving a second MA request from the host, wherein the second MA request does not comprise a relative memory address;
automatically incrementing the first address of the memory medium or the relative memory address, wherein said automatically incrementing is performed in response to receiving the second MA request
performing operations according to the second MA request using the automatically incremented address of the memory medium, wherein said performing operations is not performed by the host.
21. A method for processing a memory access (MA) request, comprising:
receiving a MA request from a host, wherein the MA request comprises a request to read data from a memory location in a memory medium or a request to write data to a memory location in the memory medium, and wherein the MA request comprises a relative memory address;
translating the relative memory address into a first address of the memory medium, wherein said translating comprises providing memory protection of the memory medium, wherein said providing memory protection comprises using base limit memory protection;
performing operations according to the MA request using the first address of the memory medium, wherein said performing operations is not performed by the host.