IP Library Granted Patent US 8,427,804
Granted Patent B2
US 8,427,804 · App. 12/186,797 · Granted Apr 23, 2013

Power amplifier

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Quick Facts
Patent No.
US 8,427,804
App. No.
12/186,797
Granted
Apr 23, 2013
Kind
B2
Abstract

A power amplifier for driving a load connected to an output terminal having an output transistor connected in parallel with a corresponding current detection path between the output terminal and a power supply. The detection path includes a switching device and a resistor connected in series, the switching device is turned on only during an on-state period of the corresponding output transistor, and the presence or absence of over-current generation is detected at the output transistors on the basis of a sensing signal obtained from a point connecting the switching device and the resistor. When over-current is detected, the operation of the output transistors is stopped to protect the amplifier.

Claims (28)

1. A power amplifier for driving a load connected to an output terminal, comprising:

an output transistor connected between said output terminal and a power supply, said output transistor supplying a driving signal to said load;

an amplifier driver for driving said output transistor;

a current detection path comprising a switching device and a resistor connected in series and said path disposed in parallel with said output transistor between said power supply and said output terminal; and

an over-current detector for controlling said switching device so as to turn on during an on-state operating period of said output transistor and detecting over-current flowing to said output transistor on the basis of a sensing signal obtained from a point connecting said switching device and said resistor of said current detection path;

wherein the sensing signal and a signal for turning on or off the switching device are input to a first AND gate;

the over-current detector is configured to control said output transistor on the basis of the output signal of the AND gate;

wherein the power amplifier further comprises a second AND gate configured to output the signal for turning on or off the switching device to the first AND gate; and

wherein inputs to the second AND gate comprise:

a first signal provided from a pre-drive;

a gate signal obtained by delaying the first signal with a first delay circuit; and

a delayed gate signal obtained by delaying the gate signal by a second delay circuit.

2. A power amplifier according to claim 1 , further comprising a switch controller for controlling said switching device of said current detection path;

said switch controller sets said switching device into a conduction state after a predetermined delay period from start of on-state operation of said output transistor disposed in parallel with said current detection path; and said over-current detector judges whether or not over-current flows on the basis of a sensing signal obtained during a conduction state of said switching device from a point connecting said switching device and said resistor.

3. A power amplifier according to claim 1 , wherein: said amplifier driver drives said output transistor on and off with a pulse-shaped driving signal in accordance with a pulse width modulated signal.

4. A power amplifier according to claim 1 , wherein:

said output transistor comprises a high-voltage output transistor disposed between a high-voltage power supply and said output terminal and a low-voltage output transistor disposed between a low-voltage power supply and said output terminal;

a high-voltage current detection path is disposed between said high-voltage power supply and said output terminal and a low-voltage current detection path is disposed between said output terminal and said low-voltage power supply,

said high-voltage current detection path and said low-voltage current detection path respectively comprise said switching device and said resistor; and

on the basis of a sensing signal obtained by controlling the switching devices of said high-voltage current detection path and said low-voltage current detection path to turn on, generation of said over-current in a corresponding output transistor is detected.

5. A power amplifier according to claim 4 , wherein:

said amplifier driver comprises a high-voltage amplifier driver for driving said high-voltage output transistor and a low-voltage amplifier driver for driving said low-voltage output transistor;

a common power supply as a high-voltage amplifier driver power supply is connected to said high-voltage amplifier driver and said low-voltage amplifier driver;

a boot capacitor can be connected between said output terminal and a boot terminal to which a predetermined power supply is connected; and

a driving signal output from said output terminal via said high-voltage output transistor is stepped up in voltage in accordance with a holding voltage of said boot capacitor charged via said boot terminal.

6. A power amplifier according to claim 4 further comprising a switch controller for controlling said switching device of said current detection path;

said switch controller sets said switching device into a conduction state at a timing of a predetermined delay period from start of on-state operation of said output transistor disposed in parallel with said current detection path; and said over-current detector judges whether or not over-current flows on the basis of a sensing signal obtained during a conduction state of said switching device from a point connecting said switching device and said resistor.

7. A power amplifier according to claim 4 , wherein: said amplifier driver drives said output transistor on and off with a pulse-shaped driving signal in accordance with a pulse width modulated signal.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033813 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 21, 2015
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034816/0510 →
CHANGE OF NAME Recorded Dec 3, 2014
From: SANYO SEMICONDUCTOR CO., LTD
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 034537/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033813/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2008
From: MATSUMOTO, YOSHITAKA
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 021760/0986 →