IP Library Granted Patent US 7,750,455
Granted Patent B2
US 7,750,455 · App. 12/188,210 · Granted Jul 6, 2010

Triple tier package on package system

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Quick Facts
Patent No.
US 7,750,455
App. No.
12/188,210
Granted
Jul 6, 2010
Kind
B2
Abstract

An integrated circuit package system includes: providing a first package having a first interposer mounted over a first integrated circuit and the first integrated circuit encapsulated by a first encapsulation; and connecting a second package over the first interposer and on the first encapsulation, the second package including a second integrated circuit having a wire-in-film adhesive thereover, a second interposer mounted on the wire-in-film adhesive and encapsulated by a second encapsulation encapsulating the second integrated circuit, the second interposer including an interconnection pad for connecting a third package to the top thereof.

Claims (52)

1. An integrated circuit package system comprising:

providing a first package having a first interposer mounted over a first integrated circuit and the first integrated circuit encapsulated by a first encapsulation; and

connecting a second package over the first interposer and on the first encapsulation, the second package including a second integrated circuit having a wire-in-film adhesive thereover, a second interposer mounted on the wire-in-film adhesive and encapsulated by a second encapsulation encapsulating the second integrated circuit, the second interposer including an interconnection pad for connecting a third package to the top thereof.

2. The system as claimed in claim 1 wherein:

connecting the second package includes mounting a third integrated circuit below the second integrated circuit.

3. The system as claimed in claim 1 wherein:

connecting the second package includes forming a mold riser in the second encapsulation.

4. The system as claimed in claim 1 wherein:

connecting the second package includes forming a stud bump in the second encapsulation and connected to the second interposer.

5. The system as claimed in claim 1 wherein:

connecting the second package includes forming stud bumps that are stacked in the second encapsulation and connected to the second interposer.

6. An integrated circuit package system comprising:

providing a first package having a first interposer mounted over a first integrated circuit and the first integrated circuit encapsulated by a first encapsulation;

connecting a second package over the first interposer and on the first encapsulation, the second package including a first wire-bonded die having a wire-in-film adhesive thereover, a second interposer mounted on the wire-in-film adhesive and encapsulated by a second encapsulation encapsulating the first wire-bonded die, the second interposer including an interconnection pad; and

mounting a third package above the second package and connected to the interconnection pad.

7. The system as claimed in claim 6 wherein:

connecting the second package includes forming a stud bump in the second encapsulation and connected to a bond wire; and

mounting a third package includes connecting the third package to the stud bump.

8. The system as claimed in claim 6 wherein:

connecting the second package includes forming a mold riser in the second encapsulation; and

mounting the third package includes mounting the third package touching the mold riser.

9. The system as claimed in claim 6 wherein:

connecting the second package includes only partially encapsulating the second interposer with the second encapsulation.

10. The system as claimed in claim 6 further comprising:

filling between the third package and the second package with an under-fill.

11. An integrated circuit package system comprising:

a first package having a first interposer mounted over a first integrated circuit and the first integrated circuit encapsulated by a first encapsulation; and

a second package connected over the first interposer and on the first encapsulation, the second package including a second integrated circuit having a wire-in-film adhesive thereover, a second interposer mounted on the wire-in-film adhesive and encapsulated by a second encapsulation encapsulating the second integrated circuit, the second interposer including an interconnection pad for connecting a third package to the top thereof.

12. The system as claimed in claim 11 wherein:

the second package includes a third integrated circuit mounted below the second integrated circuit.

13. The system as claimed in claim 11 wherein:

the second package includes a mold riser in the second encapsulation.

14. The system as claimed in claim 11 wherein:

the second package includes a stud bump in the second encapsulation and the stud bump being connected to the second interposer.

15. The system as claimed in claim 11 wherein:

the second package includes stud bumps that are stacked in the second encapsulation and the stud bumps are connected to the second interposer.

16. The system as claimed in claim 11 further comprising:

a third package mounted above the second package and connected to the interconnection pad;

wherein:

the second package includes a second substrate mounted below the second integrated circuit;

the second integrated circuit is a first wire-bonded die; and

the second package includes a bond wire connecting the second interposer to the second substrate.

17. The system as claimed in claim 16 wherein:

the second package includes a stud bump in the second encapsulation and the stud bump is connected to bond wire; and

the third package is connected to the stud bump.

18. The system as claimed in claim 16 wherein:

the second package includes a mold riser in the second encapsulation; and

the third package is touching the mold riser.

19. The system as claimed in claim 16 wherein:

the second interposer is only partially encapsulated by the encapsulation.

20. The system as claimed in claim 16 further comprising:

an under-fill between the third package and the second package.

Assignments (5)
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2008
From: PAGAILA, REZA ARGENTY; DO, BYUNG TAI
To: STATS CHIPPAC LTD.
Reel/Frame 021497/0510 →