IP Library › Assignment 036288/0748

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Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask

App. No. 14/682,914

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Semiconductor Device and Method of Forming Stress Relief Layer Between Die and Interconnect Structure

App. No. 14/637,054

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Semiconductor Device and Method of Forming Stepped Interconnect Layer for Stacked Semiconductor Die

App. No. 14/612,075

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Semiconductor Device and Method of Forming a Shielding Layer Over a Semiconductor Die Disposed in a Cavity of an Interconnect Structure and Grounded Through the Die TSV

App. No. 14/600,825

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Semiconductor Device and Method of Forming Interposer Frame Electrically Connected to Embedded Semiconductor Die

App. No. 14/596,080

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Semiconductor Device and Method of Forming Conductive Layer Over Substrate with Vents to Channel Bump Material and Reduce Interconnect Voids

App. No. 14/572,298

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS THROUGH INTERCONNECT STRUCTURES AND ENCAPSULANT OF WLCSP

App. No. 14/566,870

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Semiconductor Device and Method of Forming WLCSP Using Wafer Sections Containing Multiple Die

App. No. 14/565,731

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Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration

App. No. 14/563,448

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Semiconductor Device and Method of Forming a Shielding Layer Between Stacked Semiconductor Die

App. No. 14/553,358

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Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer

App. No. 14/523,556

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE

App. No. 14/514,190

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Semiconductor Device and Method for Forming Openings and Trenches in Insulating Layer by First LDA and Second LDA for RDL Formation

App. No. 14/512,614

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Semiconductor Device and Method of Forming Thermal Lid for Balancing Warpage and Thermal Management

App. No. 14/509,785

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE OVER SEED LAYER ON CONTACT PAD OF SEMICONDUCTOR DIE WITHOUT UNDERCUTTING SEED LAYER BENEATH INTERCONNECT STRUCTURE

App. No. 14/503,698

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PAD LAYOUT FOR FLIPCHIP SEMICONDUCTOR DIE

App. No. 14/503,086

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SACRIFICIAL PROTECTIVE LAYER TO PROTECT SEMICONDUCTOR DIE EDGE DURING SINGULATION

App. No. 14/494,508

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SEMICONDUCTOR DEVICE AND METHOD OF USING LEADFRAME BODIES TO FORM OPENINGS THROUGH ENCAPSULANT FOR VERTICAL INTERCONNECT OF SEMICONDUCTOR DIE

App. No. 14/466,923

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Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant

App. No. 14/462,347

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SEMICONDUCTOR DEVICE AND METHOD OF MAKING WAFER LEVEL CHIP SCALE PACKAGE

App. No. 14/449,914

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE

App. No. 14/449,869

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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTING STRUCTURE

App. No. 14/341,578

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Integrated Circuit Package System with Removable Backing Element Having Plated Terminal Leads and Method of Manufacture Thereof

App. No. 14/340,436

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADHESIVE MATERIAL TO SECURE SEMICONDUCTOR DIE TO CARRIER IN WLCSP

App. No. 14/340,187

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Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces

App. No. 14/334,229

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INDUCTOR OVER INSULATING MATERIAL FILLED TRENCH IN SUBSTRATE

App. No. 14/332,631

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Semiconductor Device and Method of Forming Shielding Layer Over Semiconductor Die Mounted to TSV Interposer

App. No. 14/331,050

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Semiconductor Device and Method of Forming Stacked Semiconductor Die and Conductive Interconnect Structure Through an Encapsulant

App. No. 14/330,704

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SEMICONDUCTOR DEVICE AND METHOD OF BALANCING SURFACES OF AN EMBEDDED PCB UNIT WITH A DUMMY COPPER PATTERN

App. No. 14/329,464

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH ROUTING DENSITY INTERCONNECT SITES ON SUBSTRATE

App. No. 14/329,162

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Semiconductor Device and Method of Forming Bump Structure with Insulating Buffer Layer to Reduce Stress on Semiconductor Wafer

App. No. 14/328,922

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STACKABLE PACKAGE BY USING INTERNAL STACKING MODULES

App. No. 14/328,348

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SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS

App. No. 14/326,789

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Semiconductor Device and Method of Forming TMV and TSV in WLCSP Using Same Carrier

App. No. 14/326,237

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Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer

App. No. 14/321,370

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SOLDER JOINT FLIP CHIP INTERCONNECTION

App. No. 14/305,185

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Semiconductor Device and Method of Forming Shielding Layer Over Active Surface of Semiconductor Die

App. No. 14/303,484

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Semiconductor Device Including RDL Along Sloped Side Surface of Semiconductor Die for Z-Direction Interconnect

App. No. 14/292,925

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING UBM STRUCTURE ON BACK SURFACE OF TSV SEMICONDUCTOR WAFER

App. No. 14/288,589

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Semiconductor Device and Method of Forming an Inductor on Polymer Matrix Composite Substrate

App. No. 14/289,344

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Semiconductor Device and Method of Forming Repassivation Layer with Reduced Opening to Contact Pad of Semiconductor Die

App. No. 14/284,752

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Semiconductor Device and Method of Forming a Dual UBM Structure for Lead Free Bump Connections

App. No. 14/275,213

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF

App. No. 14/274,599

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL AROUND BUMP INTERCONNECT

App. No. 14/268,316

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Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP

App. No. 14/267,800

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Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV

App. No. 14/267,777

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SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING BUMPS FORMED ON SEMICONDUCTOR DIE INTO PENETRABLE ADHESIVE LAYER TO REDUCE DIE SHIFTING DURING ENCAPSULATION

App. No. 14/265,782

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Semiconductor Device and Method of Stacking Semiconductor Die on a Fan-Out WLCSP

App. No. 14/261,252

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Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch

App. No. 14/258,300

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Semiconductor Device and Method of Forming Insulating Layer in Notches Around Conductive TSV for Stress Relief

App. No. 14/257,850

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Semiconductor Device with Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate

App. No. 14/256,047

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Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street

App. No. 14/249,307

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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE

App. No. 14/224,931

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STRESS-REDUCED CONDUCTIVE JOINT STRUCTURES

App. No. 14/223,695

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS USING BACKSIDE VIA REVEAL AND SELECTIVE PASSIVATION

App. No. 14/222,547

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EXTENDED REDISTRIBUTION LAYERS BUMPED WAFER

App. No. 14/214,120

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Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die

App. No. 14/194,691

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Semiconductor Device and Method of Forming Embedded Conductive Layer for Power/Ground Planes in FO-EWLB

App. No. 14/193,267

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES

App. No. 14/192,706

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Semiconductor Device and Method of Forming Ultra High Density Embedded Semiconductor Die Package

App. No. 14/187,014

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Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating

App. No. 14/181,429

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Flip Chip Interconnection Structure

App. No. 14/170,295

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Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask

App. No. 14/160,796

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EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER

App. No. 14/154,049

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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL WITH SOLDER MASK PATCH

App. No. 14/144,906

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Semiconductor Device and Method of Making TSV Interconnect Structures Using Encapsulant for Structural Support

App. No. 14/143,891

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Semiconductor Package and Method of Mounting Semiconductor Die to Opposite Sides of TSV Substrate

App. No. 14/138,646

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Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability

App. No. 14/138,382

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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIALESS SUBSTRATE AND METHOD OF MANUFACTURE THEREOF

App. No. 14/136,513

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METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLASMA PROCESSING

App. No. 14/137,352

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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE INK AND METHOD OF MANUFACTURE THEREOF

App. No. 14/136,274

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Semiconductor Device and Method of Forming a POP Device with Embedded Vertical Interconnect Units

App. No. 14/135,415

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SEMICONDUCTOR DEVICE AND METHOD OF USING A STANDARDIZED CARRIER IN SEMICONDUCTOR PACKAGING

App. No. 14/097,534

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SEMICONDUCTOR DEVICE INCLUDING INTEGRATED PASSIVE DEVICE FORMED OVER SEMICONDUCTOR DIE WITH CONDUCTIVE BRIDGE AND FAN-OUT REDISTRIBUTION LAYER

App. No. 14/092,304

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SEMICONDUCTOR DEVICE WITH DUMMY METAL PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER

App. No. 14/090,036

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Semiconductor Device with Protective Layer Over Exposed Surfaces of Semiconductor Die

App. No. 14/087,653

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Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer

App. No. 14/084,745

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Semiconductor Device and Method of Forming Conductive THV and RDL on Opposite Sides of Semiconductor Die for RDL-to-RDL Bonding

App. No. 14/082,155

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Semiconductor Device and Method of Forming FO-WLCSP with Multiple Encapsulants

App. No. 14/080,609

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Semiconductor Device and Method of Forming Thick Encapsulant for Stiffness with Recesses for Stress Relief in FO-WLCSP

App. No. 14/079,273

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Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages

App. No. 14/070,509

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SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE

App. No. 14/063,274

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS

App. No. 14/061,244

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Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP

App. No. 14/043,751

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SEMICONDUCTOR DEVICE AND METHOD OF MAKING BUMPLESS FLIPCHIP INTERCONNECT STRUCTURES

App. No. 14/039,418

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Semiconductor Device and Method of Bonding Semiconductor Die to Substrate in Reconstituted Wafer Form

App. No. 14/039,092

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Semiconductor Device and Method of Forming Low Profile Fan-Out Package with Vertical Interconnection Units

App. No. 14/038,575

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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE TRACES AND METHOD OF MANUFACTURE THEREOF

App. No. 14/038,577

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SEMICONDUCTOR DEVICE AND METHOD OF SIMULTANEOUS MOLDING AND THERMALCOMPRESSION BONDING

App. No. 14/038,339

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Semiconductor Device and Method of Using a Standardized Carrier to Form Embedded Wafer Level Chip Scale Packages

App. No. 14/036,525

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Semiconductor Device and Method of Controlling Warpage in Reconstituted Wafer

App. No. 14/036,193

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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SPREADER AND METHOD OF MANUFACTURE THEREOF

App. No. 14/037,110

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Semiconductor Device and Method of Forming Dual Fan-Out Semiconductor Package

App. No. 14/035,726

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE

App. No. 14/020,996

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Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure

App. No. 14/021,056

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Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor

App. No. 14/021,208

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Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape

App. No. 14/021,740

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY ADJACENT TO SENSITIVE REGION OF SEMICONDUCTOR DIE USING WAFER-LEVEL UNDERFILL MATERIAL

App. No. 14/021,206

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Semiconductor Device and Method of Forming Bump-on-Lead Interconnection

App. No. 14/021,914

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SEMICONDUCTOR DEVICE HAVING BALANCED BAND-PASS FILTER IMPLEMENTED WITH LC RESONATORS

App. No. 14/018,282

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