Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structure
View Patent ↗A semiconductor device has a first interconnect structure. A first semiconductor die has an active surface oriented towards and mounted to a first surface of the first interconnect structure. A first encapsulant is deposited over the first interconnect structure and first semiconductor die. A second semiconductor die has an active surface oriented towards and mounted to a second surface of the first interconnect structure opposite the first surface. A plurality of first conductive pillars is formed over the second surface of the first interconnect structure and around the second semiconductor die. A second encapsulant is deposited over the second semiconductor die and around the plurality of first conductive pillars. A second interconnect structure including a conductive layer and bumps are formed over the second encapsulant and electrically connect to the plurality of first conductive pillars and the first and second semiconductor die.
1. A method of making a semiconductor device, comprising:
providing a first semiconductor die including an active surface;
depositing an encapsulant over the first semiconductor die;
forming a first interconnect structure over the active surface of the first semiconductor die;
disposing a second semiconductor component over the first interconnect structure and the active surface of the first semiconductor die; and
forming a second interconnect structure over the first interconnect structure opposite the first semiconductor die.
2. The method of claim 1 , wherein the second interconnect structure includes a bump.
3. The method of claim 1 , wherein the second interconnect structure includes a conductive pillar.
4. The method of claim 1 , further including disposing a third semiconductor component adjacent to the second semiconductor component.
5. The method of claim 1 , further including disposing a third interconnect structure over the first semiconductor die opposite the first interconnect structure.
6. The method of claim 1 , wherein the second semiconductor component includes a discrete semiconductor component.
7. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
forming a first interconnect structure over the first semiconductor die;
disposing a second semiconductor die over the first interconnect structure and first semiconductor die; and
forming a second interconnect structure over the first interconnect structure.
8. The method of claim 7 , wherein the second interconnect structure includes a bump.
9. The method of claim 7 , wherein the second interconnect structure includes a conductive pillar.
10. The method of claim 7 , further including depositing an encapsulant around the second semiconductor die.
11. The method of claim 7 , further including disposing a third semiconductor die over the first semiconductor die.
12. The method of claim 7 , further including forming a third interconnect structure in a peripheral region around the first semiconductor die.
13. The method of claim 7 , further including forming a conductive layer over the second semiconductor die.
14. A semiconductor device, comprising:
a first semiconductor die;
a second semiconductor die disposed over an active surface of the first semiconductor die; and
a first interconnect structure disposed in a peripheral region around the second semiconductor die.
15. The semiconductor device of claim 14 , further including a second interconnect structure disposed between the active surface of the first semiconductor die and the second semiconductor die.
16. The semiconductor device of claim 14 , wherein the first interconnect structure includes a bump.
17. The semiconductor device of claim 14 , wherein the first interconnect structure includes a conductive pillar.
18. The semiconductor device of claim 14 , further including a third semiconductor die disposed over the first semiconductor die.
19. The semiconductor device of claim 14 , further including a second interconnect structure disposed over the first semiconductor die.
20. The semiconductor device of claim 14 , further including a conductive layer disposed over the second semiconductor die.
21. A semiconductor device, comprising:
a first semiconductor die;
a second semiconductor die disposed over the first semiconductor die; and
a first interconnect structure disposed in a peripheral region around the second semiconductor die.
22. The semiconductor device of claim 21 , further including a second interconnect structure disposed between the first semiconductor die and the second semiconductor die.
23. The semiconductor device of claim 22 , wherein a contact pad of the second semiconductor die is oriented toward the second interconnect structure.
24. The semiconductor device of claim 21 , further including a third semiconductor die disposed over the first semiconductor die.
25. The semiconductor device of claim 21 , wherein the first interconnect structure includes a bump or a conductive pillar.