IP Library › Assignment 052963/0546

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Semiconductor Device and Method of Forming Conductive Layer Over Substrate with Vents to Channel Bump Material and Reduce Interconnect Voids

App. No. 14/572,298

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Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer

App. No. 14/523,556

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE

App. No. 14/514,190

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Semiconductor Device and Method of Forming Thermal Lid for Balancing Warpage and Thermal Management

App. No. 14/509,785

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PAD LAYOUT FOR FLIPCHIP SEMICONDUCTOR DIE

App. No. 14/503,086

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SACRIFICIAL PROTECTIVE LAYER TO PROTECT SEMICONDUCTOR DIE EDGE DURING SINGULATION

App. No. 14/494,508

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE

App. No. 14/449,869

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Integrated Circuit Package System with Removable Backing Element Having Plated Terminal Leads and Method of Manufacture Thereof

App. No. 14/340,436

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Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces

App. No. 14/334,229

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INDUCTOR OVER INSULATING MATERIAL FILLED TRENCH IN SUBSTRATE

App. No. 14/332,631

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Semiconductor Device and Method of Forming Stacked Semiconductor Die and Conductive Interconnect Structure Through an Encapsulant

App. No. 14/330,704

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SEMICONDUCTOR DEVICE AND METHOD OF BALANCING SURFACES OF AN EMBEDDED PCB UNIT WITH A DUMMY COPPER PATTERN

App. No. 14/329,464

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH ROUTING DENSITY INTERCONNECT SITES ON SUBSTRATE

App. No. 14/329,162

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STACKABLE PACKAGE BY USING INTERNAL STACKING MODULES

App. No. 14/328,348

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SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS

App. No. 14/326,789

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Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer

App. No. 14/321,370

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SOLDER JOINT FLIP CHIP INTERCONNECTION

App. No. 14/305,185

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Semiconductor Device and Method of Forming Shielding Layer Over Active Surface of Semiconductor Die

App. No. 14/303,484

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Semiconductor Device and Method of Forming a Dual UBM Structure for Lead Free Bump Connections

App. No. 14/275,213

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL AROUND BUMP INTERCONNECT

App. No. 14/268,316

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Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV

App. No. 14/267,777

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Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch

App. No. 14/258,300

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Semiconductor Device with Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate

App. No. 14/256,047

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Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street

App. No. 14/249,307

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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE

App. No. 14/224,931

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STRESS-REDUCED CONDUCTIVE JOINT STRUCTURES

App. No. 14/223,695

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EXTENDED REDISTRIBUTION LAYERS BUMPED WAFER

App. No. 14/214,120

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Semiconductor Device and Method of Forming Embedded Conductive Layer for Power/Ground Planes in FO-EWLB

App. No. 14/193,267

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES

App. No. 14/192,706

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Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating

App. No. 14/181,429

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Flip Chip Interconnection Structure

App. No. 14/170,295

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Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask

App. No. 14/160,796

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EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER

App. No. 14/154,049

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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL WITH SOLDER MASK PATCH

App. No. 14/144,906

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Semiconductor Device and Method of Making TSV Interconnect Structures Using Encapsulant for Structural Support

App. No. 14/143,891

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Semiconductor Package and Method of Mounting Semiconductor Die to Opposite Sides of TSV Substrate

App. No. 14/138,646

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Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability

App. No. 14/138,382

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Semiconductor Device and Method of Forming a POP Device with Embedded Vertical Interconnect Units

App. No. 14/135,415

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SEMICONDUCTOR DEVICE AND METHOD OF USING A STANDARDIZED CARRIER IN SEMICONDUCTOR PACKAGING

App. No. 14/097,534

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SEMICONDUCTOR DEVICE WITH DUMMY METAL PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER

App. No. 14/090,036

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Semiconductor Device with Protective Layer Over Exposed Surfaces of Semiconductor Die

App. No. 14/087,653

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Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer

App. No. 14/084,745

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Semiconductor Device and Method of Forming Conductive THV and RDL on Opposite Sides of Semiconductor Die for RDL-to-RDL Bonding

App. No. 14/082,155

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Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages

App. No. 14/070,509

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SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE

App. No. 14/063,274

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS

App. No. 14/061,244

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SEMICONDUCTOR DEVICE AND METHOD OF MAKING BUMPLESS FLIPCHIP INTERCONNECT STRUCTURES

App. No. 14/039,418

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Semiconductor Device and Method of Bonding Semiconductor Die to Substrate in Reconstituted Wafer Form

App. No. 14/039,092

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Semiconductor Device and Method of Forming Low Profile Fan-Out Package with Vertical Interconnection Units

App. No. 14/038,575

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SEMICONDUCTOR DEVICE AND METHOD OF SIMULTANEOUS MOLDING AND THERMALCOMPRESSION BONDING

App. No. 14/038,339

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Semiconductor Device and Method of Using a Standardized Carrier to Form Embedded Wafer Level Chip Scale Packages

App. No. 14/036,525

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Semiconductor Device and Method of Controlling Warpage in Reconstituted Wafer

App. No. 14/036,193

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE

App. No. 14/020,996

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Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure

App. No. 14/021,056

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Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor

App. No. 14/021,208

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Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape

App. No. 14/021,740

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Semiconductor Device and Method of Forming Bump-on-Lead Interconnection

App. No. 14/021,914

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SEMICONDUCTOR DEVICE HAVING BALANCED BAND-PASS FILTER IMPLEMENTED WITH LC RESONATORS

App. No. 14/018,282

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Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation

App. No. 14/017,963

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION

App. No. 14/011,491

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Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die

App. No. 13/944,825

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Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material

App. No. 13/944,783

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SEMICONDUCTOR PACKAGE WITH EMBEDDED DIE

App. No. 13/935,053

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV

App. No. 13/935,312

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Semiconductor Device and Method of Using Substrate With Conductive Posts and Protective Layers to Form Embedded Sensor Die Package

App. No. 13/930,980

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING LOW PROFILE 3D FAN-OUT PACKAGE

App. No. 13/931,397

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Methods of Forming Conductive Materials on Contact Pads

App. No. 13/929,767

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Semiconductor Device and Method of Forming Trench and Disposing Semiconductor Die Over Substrate to Control Outward Flow of Underfill Material

App. No. 13/929,485

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Semiconductor Device and Method of Forming an Interposer Including a Beveled Edge

App. No. 13/929,426

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Semiconductor Device and Method of Individual Die Bonding Followed by Simultaneous Multiple Die Thermal Compression Bonding

App. No. 13/928,862

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Methods of Forming Conductive and Insulating Layers

App. No. 13/929,776

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METHODS OF FORMING CONDUCTIVE JUMPER TRACES

App. No. 13/929,775

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Semiconductor Method and Device of Forming a Fan-Out Device with PWB Vertical Interconnect Units

App. No. 13/917,982

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SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR

App. No. 13/910,786

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE

App. No. 13/906,667

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SEMICONDUCTOR DEVICE WITH BUMP FORMED ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS

App. No. 13/906,844

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Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue

App. No. 13/906,489

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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH

App. No. 13/905,845

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Semiconductor Device and Method of Forming Reconstituted Wafer With Larger Carrier to Achieve More EWLB Packages Per Wafer with Encapsulant Deposited Under Temperature and Pressure

App. No. 13/906,060

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Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die

App. No. 13/896,635

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METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND

App. No. 13/893,616

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Methods of Manufacturing Flip Chip Semiconductor Packages Using Double-Sided Thermal Compression Bonding

App. No. 13/853,810

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SEMICONDUCTOR DEVICE AND METHOD OF CALIBRATING WARPAGE TESTING SYSTEM TO ACCURATELY MEASURE SEMICONDUCTOR PACKAGE WARPAGE

App. No. 13/846,593

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING DUAL-SIDED INTERCONNECT STRUCTURES IN FO-WLCSP

App. No. 13/832,449

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Semiconductor Device and Method of Forming Build-Up Interconnect Structures Over Carrier for Testing at Interim Stages

App. No. 13/832,118

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Semiconductor Device and Method of Forming Dual-Sided Interconnect Structures in FO-WLCSP

App. No. 13/832,205

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Semiconductor Device and Method of Depositing Encapsulant Along Sides and Surface Edge of Semiconductor Die in Embedded WLCSP

App. No. 13/832,809

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Semiconductor Device and Method of Forming WLCSP with Semiconductor Die Embedded within Interconnect Structure

App. No. 13/801,294

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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE CIRCUITRY AND METHOD OF MANUFACTURE THEREOF

App. No. 13/791,375

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SUPPORTING LAYER OVER SEMICONDUCTOR DIE IN THIN FAN-OUT WAFER LEVEL CHIP SCALE PACKAGE

App. No. 13/630,912

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Semiconductor Device and Method of Reflow Soldering for Conductive Column Structure in Flip Chip Package

App. No. 13/489,143

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SEMICONDUCTOR DEVICE AND METHOD OF BACKGRINDING AND SINGULATION OF SEMICONDUCTOR WAFER WHILE REDUCING KERF SHIFTING AND PROTECTING WAFER SURFACES

App. No. 13/488,029

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Semiconductor Method and Device of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units

App. No. 13/477,982

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Semiconductor Device and Method of Controlling Warpage in Semiconductor Package

App. No. 13/471,314

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Semiconductor Device and Method of Depositing Underfill Material With Uniform Flow Rate

App. No. 13/466,945

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SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS

App. No. 13/429,119

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL OVER BUMP INTERCONNECT CONDUCTIVE LAYER FOR STRESS RELIEF

App. No. 13/426,552

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SEMICONDUCTOR DEVICE AND METHOD OF SINGULATING SEMICONDUCTOR WAFER ALONG MODIFIED REGION WITHIN NON-ACTIVE REGION FORMED BY IRRADIATING ENERGY THROUGH MOUNTING TAPE

App. No. 13/426,416

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SEMICONDUCTOR DEVICE AND METHOD FOR FORMING OPENINGS AND TRENCHES IN INSULATING LAYER BY FIRST LDA AND SECOND LDA FOR RDL FORMATION

App. No. 13/426,561

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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE LAYER OVER METAL SUBSTRATE FOR ELECTRICAL INTERCONNECT OF SEMICONDUCTOR DIE

App. No. 13/425,349

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