IP Library Granted Patent US 8,791,556
Granted Patent B2
US 8,791,556 · App. 13/791,375 · Granted Jul 29, 2014

Integrated circuit packaging system with routable circuitry and method of manufacture thereof

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Quick Facts
Patent No.
US 8,791,556
App. No.
13/791,375
Granted
Jul 29, 2014
Kind
B2
Abstract

An integrated circuit packaging system, and a method of manufacture therefor, including: electrical terminals; circuitry protective material around the electrical terminals and formed to have recessed pad volumes; routable circuitry on the top surface of the circuitry protective material; and an integrated circuit die electrically connected to the electrical terminals.

Claims (30)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a lead frame;

forming routable circuitry on the top surface of the lead frame;

attaching an integrated circuit die over the lead frame;

processing the bottom surface of the lead frame for forming electrical terminals including:

providing a bottom pattern on the bottom surface of the lead frame for forming the electrical terminals,

removing a portion of the lead frame using the bottom pattern for forming the electrical terminals, and

removing the bottom pattern; and

placing circuitry protective material around the electrical terminals for forming recessed pad volumes in the circuitry protective material.

2. The method as claimed in claim 1 further comprising forming fusible material in the circuitry protective material in the recessed pad volumes and extending out from the circuitry protective material.

3. The method as claimed in claim 1 further comprising forming top pads over the electrical terminals and connected to the routable circuitry.

4. The method as claimed in claim 1 further comprising wire or fusible interconnects electrically connecting the die to the electrical terminals.

5. The method as claimed in claim 1 further comprising forming solder wettable material on the bottom surfaces of the electrical terminals.

6. The method as claimed in claim 1 further comprising forming electrical terminals under the die.

7. The method as claimed in claim 1 wherein processing the bottom surface of the lead frame includes processing for forming a die attach paddle.

8. The method as claimed in claim 1 further comprising forming extensions of the electrical terminals above the top surface of the circuitry protective material.

9. The method as claimed in claim 1 further comprising forming elevated pads on the top surfaces of the electrical terminals.

10. An integrated circuit packaging system comprising:

electrical terminals;

circuitry protective material around the electrical terminals and formed to have recessed pad volumes, the electrical terminals having extensions of the electrical terminals above a top surface of the circuitry protective material;

routable circuitry on the top surface of the circuitry protective material; and

an integrated circuit die electrically connected to the electrical terminals.

11. The system as claimed in claim 10 further comprising an encapsulation on the circuitry protective material.

12. The system as claimed in claim 10 further comprising fusible material in the circuitry protective material in the recessed pad volumes and extending out from the circuitry protective material.

13. The system as claimed in claim 10 further comprising top pads over the electrical terminals and connected to the routable circuitry.

14. The system as claimed in claim 10 further comprising wire or fusible interconnects electrically connecting the die to the electrical terminals.

15. The system as claimed in claim 10 further comprising solder wettable material on the bottom surfaces of the electrical terminals.

16. The system as claimed in claim 10 further comprising electrical terminals under the die.

17. The system as claimed in claim 10 further comprising a die attach paddle in the circuitry protective material.

18. The system as claimed in claim 10 further comprising elevated pads on the top surfaces of the electrical terminals.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064809/0877 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0208. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0387 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0208 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0391 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 8, 2013
From: DO, BYUNG TAI; TRASPORTO, ARNEL SENOSA; CHUA, LINDA PEI EE
To: STATS CHIPPAC LTD.
Reel/Frame 029955/0534 →