IP Library Granted Patent US 9,117,812
Granted Patent B2
US 9,117,812 · App. 14/138,382 · Granted Aug 25, 2015

Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliability

Inventors: JaeHyun Lee (Kyungki-do, KR); KiYoun Jang (Kyoungki-do, KR); KyungHoon Lee (Kyunggi-Do, KR); TaeWoo Lee (Kyoungki-do, KR)
Assignee: STATS ChipPAC, Ltd.
H01L23/49816H01L21/486H01L21/4814H01L21/56H01L21/76802H01L21/76838H01L23/3121H01L23/3128H01L23/3171H01L23/49811H01L23/49827H01L23/49894H01L23/5226H01L23/5329H01L24/16H01L24/27H01L24/81H01L24/94H01L24/97H01L24/11H01L24/13H01L2224/0345H01L2224/0346H01L2224/03452H01L2224/0401H01L2224/05571H01L2224/05611H01L2224/05624H01L2224/05639H01L2224/05644H01L2224/05647H01L2224/05655H01L2224/1132H01L2224/1145H01L2224/1146H01L2224/11334H01L2224/11849H01L2224/13023H01L2224/13111H01L2224/13113H01L2224/13124H01L2224/13139H01L2224/13144H01L2224/13147H01L2224/13155H01L2224/16145H01L2224/16237H01L2224/16245H01L2224/48091H01L2224/73265H01L2224/81191H01L2224/81203H01L2224/81385H01L2224/81815H01L2224/94H01L2224/97H01L2924/00014H01L2924/01322H01L2924/12041H01L2924/1306H01L2924/13091
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Quick Facts
Patent No.
US 9,117,812
App. No.
14/138,382
Granted
Aug 25, 2015
Kind
B2
Abstract

A semiconductor device has a substrate and first conductive layer formed over the substrate. An insulating layer is formed over the first substrate with an opening over the first conductive layer. A second conductive layer is formed within the opening of the insulating layer. A portion of the second conductive layer is removed to expose a horizontal surface and side surfaces of the second conductive layer below a surface of the insulating layer. The second conductive layer has non-linear surfaces to extend a contact area of the second conductive layer. The horizontal surface and side surfaces can be stepped surfaces or formed as a ring. A third conductive layer is formed over the second conductive layer. A plurality of bumps is formed over the horizontal surface and side surfaces of the second conductive layer. A semiconductor die is mounted to the substrate.

Claims (49)

1. A method of making a semiconductor device, comprising:

providing a first substrate including a first conductive layer;

forming an insulating layer over the first substrate;

forming a second conductive layer within an opening of the insulating layer; and

removing a portion of the second conductive layer to leave a nonlinear surface of the second conductive layer below a surface of the insulating layer.

2. The method of claim 1 , further including:

providing a semiconductor die including a plurality of bumps; and

disposing the semiconductor die over the first substrate with the bumps covering the second conductive layer.

3. The method of claim 2 , further including:

providing a second substrate; and

disposing the first substrate and semiconductor die over the second substrate.

4. The method of claim 1 , further including removing a portion of the insulating layer from a horizontal surface.

5. The method of claim 1 , further including forming the second conductive layer including a ring shape.

6. The method of claim 1 , further including forming a third conductive layer over the second conductive layer.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first conductive layer over the substrate;

forming an insulating layer over the first conductive layer; and

forming a second conductive layer within an opening of the insulating layer and below a surface of the insulating layer, the second conductive layer including a non-linear surface extending a contact area of the second conductive layer.

8. The method of claim 7 , wherein forming the second conductive layer includes removing a portion of the second conductive layer to form the non-linear surface of the second conductive layer.

9. The method of claim 7 , further including:

providing a semiconductor die including a plurality of bumps; and

disposing the semiconductor die over the substrate with the bumps covering the second conductive layer.

10. The method of claim 7 , further including forming the second conductive layer with stepped surfaces.

11. The method of claim 7 , further including forming the second conductive layer including a ring shape.

12. The method of claim 7 , further including forming a third conductive layer over the second conductive layer.

13. The method of claim 7 , further including forming the opening in the insulating layer using laser direct ablation.

14. A method of making a semiconductor device, comprising:

providing a substrate including a conductive via;

forming an insulating layer over the substrate;

forming a first conductive layer within a first opening of the insulating layer over the conductive via and below a top surface of the insulating layer; and

forming a second opening between a side surface of the insulating layer and a side surface of the first conductive layer.

15. The method of claim 14 , wherein forming the first conductive layer further includes removing a portion of the first conductive layer to form a non-linear surface of the first conductive layer.

16. The method of claim 15 , further including:

providing a semiconductor die including a plurality of bumps; and

disposing the semiconductor die over the substrate with the bumps covering the non-linear surface of the first conductive layer.

17. The method of claim 14 , further including removing a portion of the insulating layer to leave the side surface of the first conductive layer below the surface of the insulating layer.

18. The method of claim 14 , further including forming the first conductive layer including a ring shape.

19. The method of claim 14 , further including forming a second conductive layer over the first conductive layer.

20. The method of claim 14 , further including forming the first opening in the insulating layer using laser direct ablation.

21. A semiconductor device, comprising:

a substrate including a conductive via;

an insulating layer formed over the conductive via; and

a first conductive layer formed within a first opening of the insulating layer and below a top surface of the insulating layer, including a second opening formed between a side surface of the insulating layer and a side surface of the first conductive layer.

22. The semiconductor device of claim 21 , further including:

a semiconductor die; and

a plurality of bumps disposed between the semiconductor die and substrate with the bumps covering the first conductive layer.

23. The semiconductor device of claim 21 , wherein the first conductive layer is formed including a ring shape.

24. The semiconductor device of claim 21 , further including a second conductive layer formed over the first conductive layer.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064809/0877 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0391 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (2)
Continuation 13417034 · Mar 9, 2012
Related Publication 20140103503A1 · Apr 17, 2014