IP Library Granted Patent US 9,054,083
Granted Patent B2
US 9,054,083 · App. 14/143,891 · Granted Jun 9, 2015

Semiconductor device and method of making TSV interconnect structures using encapsulant for structural support

Inventors: Nathapong Suthiwongsunthorn (Singapore, SG); Pandi C. Marimuthu (Singapore, SG); Jae Hun Ku (Singapore, SG); Glenn Omandam (Singapore, SG); Hin Hwa Goh (Singapore, SG); Kock Liang Heng (Singapore, SG); Jose A. Caparas (Singapore, SG)
Assignee: STATS ChipPAC, Ltd.
H01L21/486H01L21/561H01L21/76898H01L23/3128H01L23/481H01L24/03H01L24/05H01L24/11H01L24/13H01L24/16H01L24/92H01L24/94H01L24/95H01L2224/0401H01L2224/05611H01L2224/05624H01L2224/05639H01L2224/05644H01L2224/05647H01L2224/05655H01L2224/13022H01L2224/13025H01L2224/13099H01L2224/48091H01L2224/48247H01L2224/73265H01L2224/85399H01L2224/94H01L2924/01004H01L2924/01013H01L2924/01014H01L2924/01022H01L2924/01029H01L2924/01032H01L2924/01046H01L2924/01047H01L2924/01049H01L2924/0105H01L2924/01073H01L2924/01074H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/01322H01L2924/014H01L2924/04941H01L2924/09701H01L2924/13091H01L2924/14H01L2924/1433H01L2924/15174H01L2924/15184H01L2924/15311H01L2924/19041H01L2924/19042H01L2924/19043H01L2924/19105H01L2924/30105H01L2924/0132H01L24/29H01L24/48H01L2224/83805H01L2924/01006H01L2924/01023H01L2924/01024H01L2224/16225H01L2224/29111H01L2224/2919H01L2924/1579H01L2224/131H01L2924/0001H01L21/563H01L23/49827H01L2924/12041H01L2924/1306H01L2224/16235
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,054,083
App. No.
14/143,891
Granted
Jun 9, 2015
Kind
B2
Abstract

A semiconductor device includes a substrate and a via extending through the substrate. A first insulating layer is disposed on sidewalls of the via. An electrically conductive material is disposed in the via over the first insulating layer to form a TSV. A first interconnect structure is disposed over a first side of the substrate. A semiconductor die or a component is mounted to the first interconnect structure. An encapsulant is disposed over the first interconnect structure and semiconductor die or component. A second interconnect structure is disposed over the second side of the substrate. The second interconnect structure is electrically connected to the TSV. The second interconnect structure includes a second insulating layer disposed over the second surface of the substrate and TSV, and a first conductive layer disposed over the TSV and in contact with the TSV through the second insulating layer.

Claims (69)

1. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via partially through a first surface of the substrate;

forming an interconnect structure over the first surface of the substrate;

disposing a semiconductor component over the interconnect structure;

depositing an encapsulant over the interconnect structure and the semiconductor component; and

removing a portion of a second surface of the substrate opposite the first surface.

2. The method of claim 1 , further including depositing a conductive paste over the interconnect structure.

3. The method of claim 1 , wherein forming the interconnect structure further includes:

forming a first conductive layer over the conductive via;

forming a first insulating layer over the first conductive layer;

forming a second conductive layer over the first insulating layer; and

forming a second insulating layer over the second conductive layer and first insulating layer.

4. The method of claim 3 , wherein forming the interconnect structure further includes:

forming a conductive pillar over the second conductive layer;

forming a third insulating layer around the conductive pillar; and

forming a third conductive layer over the conductive pillar and electrically connected to the semiconductor component.

5. The method of claim 1 , wherein a thickness of the substrate is in a range of 10 μm to 50 μm.

6. The method of claim 1 , wherein a thickness of the substrate is less than 300 μm.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via through the substrate;

forming an interconnect structure over the substrate;

disposing a semiconductor die over the interconnect structure; and

depositing an encapsulant over the semiconductor die.

8. The method of claim 7 , further including forming a conductive layer over the conductive via.

9. The method of claim 7 , wherein forming the interconnect structure further includes:

forming a first conductive layer over the conductive via;

forming a first insulating layer over the first conductive layer;

forming a second conductive layer over the first insulating layer; and

forming a second insulating layer over the second conductive layer and first insulating layer.

10. The method of claim 7 , further including forming a bump over the conductive via.

11. The method of claim 7 , wherein a thickness of the substrate is in a range of 10 μm to 50 μm.

12. The method of claim 7 , wherein a thickness of the substrate is less than 300 μm.

13. A method of making a semiconductor device, comprising:

providing a substrate;

forming a conductive via through the substrate;

disposing a semiconductor die over the conductive via; and

depositing an encapsulant over the semiconductor die.

14. The method of claim 13 , further including forming an interconnect structure over the substrate.

15. The method of claim 14 , wherein forming the interconnect structure further includes:

forming a first conductive layer over the conductive via;

forming a first insulating layer over the first conductive layer;

forming a second conductive layer over the first insulating layer; and

forming a second insulating layer over the second conductive layer and first insulating layer.

16. The method of claim 15 , wherein forming the interconnect structure further includes:

forming a conductive pillar over the second conductive layer;

forming a third insulating layer around the conductive pillar; and

forming a third conductive layer over the conductive pillar and electrically connected to the semiconductor die.

17. The method of claim 13 , wherein a thickness of the substrate is in a range of 10 μm to 50 μm.

18. The method of claim 13 , wherein a thickness of the substrate is less than 300 μm.

19. The method of claim 13 , further including forming a bump over the conductive via.

20. A semiconductor device, comprising:

a substrate;

a conductive via formed through the substrate;

a semiconductor die disposed over the conductive via; and

an encapsulant deposited over the semiconductor die.

21. The semiconductor device of claim 20 , further including an interconnect structure formed over the substrate with the semiconductor die disposed over the interconnect structure.

22. The semiconductor device of claim 21 , wherein the interconnect structure includes:

a first conductive layer over the conductive via;

a first insulating layer over the first conductive layer;

a second conductive layer over the first insulating layer; and

a second insulating layer over the second conductive layer and first insulating layer.

23. The semiconductor device of claim 22 , wherein the interconnect structure further includes:

a conductive pillar over the second conductive layer;

a third insulating layer around the conductive pillar; and

a third conductive layer over the conductive pillar and electrically connected to the semiconductor die.

24. The semiconductor device of claim 20 , wherein a thickness of the substrate is in a range of 10 μm to 50 μm.

25. The semiconductor device of claim 20 , wherein a thickness of the substrate is less than 300 μm.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064809/0877 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052938/0305 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0391 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0352 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (3)
Continuation 13245099 · Sep 26, 2011
Division 12480317 · Jun 8, 2009
Related Publication 20140110861A1 · Apr 24, 2014