Semiconductor device with protective layer over exposed surfaces of semiconductor die
View Patent ↗A semiconductor wafer has a plurality of first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. A shielding layer is formed between the first and second semiconductor die. An electrical interconnect, such as conductive pillar, bump, or bond wire, is formed between the first and second semiconductor die. A conductive TSV can be formed through the first and second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and electrical interconnect. A heat sink is formed over the second semiconductor die. An interconnect structure, such as a bump, can be formed over the second semiconductor die. A portion of a backside of the first semiconductor die is removed. A protective layer is formed over exposed surfaces of the first semiconductor die. The protective layer covers the exposed backside and sidewalls of the first semiconductor die.
1. A semiconductor device, comprising:
a first semiconductor die;
an interconnect structure formed over the first semiconductor die;
a second semiconductor die disposed over the interconnect structure and first semiconductor die;
an encapsulant deposited over the first and second semiconductor die; and
a protective layer formed over an exposed surface of the first semiconductor die and extending to the encapsulant including a side surface of the protective layer vertically aligned with a side surface of the encapsulant.
2. The semiconductor device of claim 1 , wherein the protective layer covers an exposed backside and exposed sidewalls of the first semiconductor die.
3. The semiconductor device of claim 1 , further including a conductive via formed through the first semiconductor die.
4. The semiconductor device of claim 1 , further including a conductive via formed through the second semiconductor die.
5. The semiconductor device of claim 1 , wherein the interconnect structure includes a conductive pillar, bond wire, or bump.
6. The semiconductor device of claim 1 , further including a shielding layer formed between the first and second semiconductor die.
7. The semiconductor device of claim 1 , further including a heat sink formed over the second semiconductor die.
8. A semiconductor device, comprising:
a first semiconductor die;
a second semiconductor die disposed over the first semiconductor die;
an encapsulant deposited over the first and second semiconductor die; and
a protective layer formed over the first semiconductor die and extending to the encapsulant including a side surface of the protective layer vertically aligned with the encapsulant.
9. The semiconductor device of claim 8 , wherein the protective layer covers an exposed backside and exposed sidewalls of the first semiconductor die.
10. The semiconductor device of claim 8 , further including a conductive via formed through the second semiconductor die.
11. The semiconductor device of claim 8 , further including an interconnect structure between the first semiconductor die and including a conductive pillar, bond wire, or bump.
12. The semiconductor device of claim 8 , further including a shielding layer formed between the first and second semiconductor die.
13. The semiconductor device of claim 8 , further including a heat sink formed over the second semiconductor die.
14. A semiconductor device, comprising:
a first semiconductor die;
a second semiconductor die disposed over the first semiconductor die;
an encapsulant deposited over the second semiconductor die; and
a protective layer formed over the encapsulant and vertically aligned with the encapsulant.
15. The semiconductor device of claim 14 , wherein the protective layer covers an exposed backside and exposed sidewalls of the first semiconductor die.
16. The semiconductor device of claim 14 , further including a conductive via formed through the second semiconductor die.
17. The semiconductor device of claim 14 , further including an interconnect structure between the first semiconductor die and including a conductive pillar, bond wire, or bump.
18. The semiconductor device of claim 14 , further including a shielding layer formed between the first and second semiconductor die.
19. The semiconductor device of claim 14 , further including a heat sink formed over the second semiconductor die.
20. A semiconductor device, comprising:
a first semiconductor die;
an encapsulant deposited over the first semiconductor die; and
a protective layer formed over the first semiconductor die and encapsulant and vertically aligned with the encapsulant.
21. The semiconductor device of claim 20 , wherein the protective layer covers an exposed backside and exposed sidewalls of the first semiconductor die.
22. The semiconductor device of claim 20 , further including a second semiconductor die disposed over the first semiconductor die.
23. The semiconductor device of claim 22 , further including a conductive via formed through the second semiconductor die.
24. The semiconductor device of claim 22 , further including a shielding layer formed between the first and second semiconductor die.
25. The semiconductor device of claim 22 , further including a heat sink formed over the second semiconductor die.