Flip Chip Interconnection Structure
A flip chip interconnection structure is formed by mechanically interlocking joining surfaces of a first and second element. The first element, which may be a bump on an integrated circuit chip, includes a soft, deformable material with a low yield strength and high elongation to failure. The surface of the second element, which may for example be a substrate pad, is provided with asperities into which the first element deforms plastically under pressure to form the mechanical interlock.
1 . A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming an interconnect structure over the semiconductor die;
providing a substrate including an interconnect pad; and
bonding the interconnect structure over the semiconductor die and interconnect pad by deforming the interconnect structure around the interconnect pad.
2 . The method of claim 1 , further including maintaining a vertical separation between the semiconductor die and substrate.
3 . The method of claim 1 , further including deforming the interconnect structure to reduce relative movement between the semiconductor die and substrate.
4 . The method of claim 1 , further including deforming the interconnect structure about 25 micrometers.
5 . The method of claim 1 , further including forming a width of the interconnect pads to be less than a width of the interconnect structure.
6 . The method of claim 1 , further including depositing an adhesive resin between the semiconductor die and substrate.
7 . A method of making a semiconductor device, comprising:
providing a semiconductor die;
providing a substrate including an interconnect pad; and
forming an interconnect structure over the semiconductor die and around the interconnect pad.
8 . The method of claim 7 , further including maintaining a vertical separation between the semiconductor die and substrate.
9 . The method of claim 7 , further including deforming the interconnect structure into a surface of the interconnect pad to reduce relative movement between the semiconductor die and substrate.
10 . The method of claim 7 , wherein the interconnect structure includes gold, copper, or nickel.
11 . The method of claim 7 , further including deforming the interconnect structure about 25 micrometers.
12 . The method of claim 7 , further including forming a width of the interconnect pad to be less than a width of the interconnect structure.
13 . The method of claim 7 , further including depositing an adhesive resin between the semiconductor die and substrate.
14 . A semiconductor device, comprising:
a semiconductor die;
an interconnect structure formed over the semiconductor die; and
a substrate including an interconnect pad, the interconnect structure deformed onto the interconnect pad.
15 . The semiconductor device of claim 14 , further including a vertical separation maintained between the semiconductor die and substrate.
16 . The semiconductor device of claim 14 , wherein the interconnect structure is deformed about 25 micrometers.
17 . The semiconductor device of claim 14 , wherein the deformation of the interconnect structure occurs along a sidewall of the interconnect structure.
18 . The semiconductor device of claim 14 , wherein the interconnect structure includes gold, copper, or nickel.
19 . The semiconductor device of claim 14 , wherein a width of the interconnect pad is less than a width of the interconnect structure.
20 . A semiconductor device, comprising:
a substrate;
an interconnect pad formed over the substrate; and
an interconnect structure deformed over the interconnect pad.
21 . The semiconductor device of claim 20 , further including:
a semiconductor die disposed over the substrate; and
a vertical separation maintained between the semiconductor die and substrate.
22 . The semiconductor device of claim 20 , wherein the interconnect structure is deformed about 25 micrometers.
23 . The semiconductor device of claim 20 , wherein the deformation of the interconnect structure occurs along a sidewall of the interconnect structure.
24 . The semiconductor device of claim 20 , wherein the interconnect structure includes gold, copper, or nickel.
25 . The semiconductor device of claim 20 , wherein a width of the interconnect pad is less than a width of the interconnect structure.