IP Library Patent Application 14181429
Patent Application
App. No. 14/181,429

Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating

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Quick Facts
Patent No.
US None
App. No.
14/181,429
Abstract

An interconnect structure for a semiconductor device is made by forming a contact pad on a substrate, forming an under bump metallization layer over the contact pad, forming a photoresist layer over the substrate, removing a portion of the photoresist layer to form an opening which exposes the UBM, depositing a first conductive material into the opening of the photoresist, removing the photoresist layer, depositing a second conductive material over the first conductive material, and coating the second conductive material with an organic solderability preservative. The interconnect structure is formed without solder reflow. The first conductive layer is nickel and the second conductive layer is copper. The organic solderability preservative is made with benzotriazole, rosin, rosin esters, benzimidazole compounds, or imidazole compounds. The interconnect structure decreases the pitch between the core pillars in the interconnect array and increases the density of I/O contacts on the semiconductor device.

Claims (99)

1 . A method of making a semiconductor device, comprising:

providing a first substrate;

forming a contact pad over the first substrate;

forming an insulating layer over the first substrate and contact pad;

forming an under bump metallization (UBM) layer over the contact pad and insulating layer;

forming a plurality of core pillars over the UBM layer by electroless plating or electrolytic plating to reduce pitch and increase density of the core pillars;

depositing a copper layer over the core pillars; and

coating the copper layer over the core pillars with an organic solderability preservative (OSP) by,

(a) first acidic cleaning of the copper layer,

(b) first water rinsing the copper layer after the first acidic cleaning,

(c) micro-etching of the copper layer after the first water rinsing,

(d) second water rinsing of the copper layer after the micro-etching,

(e) second acid cleaning of the copper layer after the second water rinsing,

(f) third water rinsing of the copper layer after the second acid cleaning,

(g) first applying of air knife to the copper layer after third water rinsing,

(h) applying the OSP to the copper layer after the first applying of the air knife by immersion in an aqueous solution including copper ions and a benzimidazole, phenylimidazole or other imidazole compound for less than one minute at a temperature range of 40-45° C. to completely cover and protect the copper layer from oxidation,

(i) second applying of air knife to the OSP,

(j) fourth water rinsing of the OSP after the second applying of the air knife, and

(k) drying the OSP to expel moisture.

2 . The method of claim 1 , wherein forming the core pillars includes:

forming a photoresist layer over the first substrate;

removing a portion of the photoresist layer to form an opening over the UBM layer;

forming the core pillar in the opening of the photoresist; and

removing the photoresist layer.

3 . The method of claim 1 , wherein the OSP includes a thickness of about 0.35 micrometers.

4 . The method of claim 1 , further including disposing the opening in the photoresist layer central to the contact pad.

5 . The method of claim 1 , further including forming the copper layer by electroless plating or electrolytic plating.

6 . The method of claim 1 , further including:

providing a second substrate including a plurality of bumps formed over the second substrate; and

bonding the first substrate to the second substrate with the bumps electrically connected to the core pillars.

7 . A method of making a semiconductor device, comprising:

providing a first substrate;

forming a plurality of core pillars over the first substrate by electroless plating or electrolytic plating;

depositing a conductive layer over the core pillars; and

forming an organic solderability preservative (OSP) over the conductive layer by,

(a) first acidic cleaning of the conductive layer,

(b) first water rinsing the conductive layer,

(c) micro-etching of the conductive layer,

(d) second water rinsing of the conductive layer,

(e) second acid cleaning of the conductive layer,

(f) third water rinsing of the conductive layer,

(g) applying the OSP to the conductive layer by immersion in an aqueous solution including copper ions,

(h) fourth water rinsing of the OSP, and

(i) drying the OSP to expel moisture.

8 . The method of claim 7 , further including:

forming a contact pad over the first substrate;

forming an under bump metallization (UBM) layer over the contact pad; and

forming the core pillars over the UBM layer.

9 . The method of claim 7 , wherein forming the core pillars includes:

forming a photoresist layer over the first substrate;

removing a portion of the photoresist layer to form an opening over the first substrate;

forming the core pillar in the opening of the photoresist; and

removing the photoresist layer.

10 . The method of claim 7 , wherein the conductive layer includes copper.

11 . The method of claim 7 , wherein the OSP is selected from a group consisting of benzotriazole, rosin, rosin esters, benzimidazole, phenylimidazole, and imidazole.

12 . The method of claim 7 , wherein the OSP includes a thickness of about 0.35 micrometers.

13 . The method of claim 7 , further including:

providing a second substrate including a plurality of bumps formed over the second substrate; and

bonding the first substrate to the second substrate with the bumps electrically connected to the core pillars.

14 . A method of making a semiconductor device, comprising:

providing a first substrate;

forming a plurality of core pillars over the first substrate without reflow to reduce pitch and increase density of the core pillars;

depositing a conductive layer over the core pillars; and

forming an organic solderability preservative (OSP) over the conductive layer to completely cover and protect the conductive layer from oxidation.

15 . The method of claim 14 , wherein forming the OSP includes:

first acidic cleaning of the conductive layer;

first water rinsing the conductive layer;

micro-etching of the conductive layer;

second water rinsing of the conductive layer;

second acid cleaning of the conductive layer;

third water rinsing of the conductive layer;

applying the OSP to the conductive layer by immersion in an aqueous solution;

fourth water rinsing of the OSP; and

drying the OSP to expel moisture.

16 . The method of claim 14 , wherein the OSP is selected from a group consisting of benzotriazole, rosin, rosin esters, benzimidazole, phenylimidazole, and imidazole.

17 . The method of claim 14 , further including:

forming a contact pad over the first substrate;

forming an under bump metallization (UBM) layer over the contact pad; and

forming the core pillars over the UBM layer.

18 . The method of claim 14 , wherein forming the core pillars includes:

forming a photoresist layer over the first substrate;

removing a portion of the photoresist layer to form an opening over the first substrate;

forming the core pillar in the opening of the photoresist; and

removing the photoresist layer.

19 . The method of claim 14 , further including forming the core pillars over the first substrate by the electroless plating or electrolytic plating.

20 . The method of claim 14 , further including:

providing a second substrate including a plurality of bumps formed over the second substrate; and

bonding the first substrate to the second substrate with the bumps electrically connected to the core pillars.

21 . A semiconductor device, comprising:

a first substrate;

a plurality of core pillars electroless plated or electrolytic plated over the first substrate;

a conductive layer formed over the core pillars; and

an organic solderability preservative (OSP) completely covering the conductive layer to protect the conductive layer from oxidation.

22 . The semiconductor device of claim 21 , further including:

a contact pad formed over the first substrate; and

an under bump metallization (UBM) layer formed over the contact pad.

23 . The semiconductor device of claim 21 , wherein the OSP is selected from a group consisting of benzotriazole, rosin, rosin esters, benzimidazole, phenylimidazole, and imidazole.

24 . The semiconductor device of claim 21 , wherein the OSP includes a thickness of about 0.35 micrometers.

25 . The semiconductor device of claim 21 , further including a second substrate including a plurality of bumps formed over the second substrate, wherein the first substrate is bonded to the second substrate with the bumps electrically connected to the core pillars.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064809/0877 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0391 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →