IP Library Granted Patent US 9,824,975
Granted Patent B2
US 9,824,975 · App. 14/612,075 · Granted Nov 21, 2017

Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die

Inventors: Reza A. Pagaila (Tangerang, ID); Byung Tai Do (Singapore, SG); Linda Pei Ee Chua (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/5386H01L21/561H01L21/565H01L21/768H01L23/3121H01L23/3128H01L23/5389H01L24/18H01L24/19H01L24/96H01L24/97H01L25/03H01L25/0657H01L25/074H01L25/50H01L21/568H01L2224/0401H01L2224/04105H01L2224/0557H01L2224/12105H01L2224/16145H01L2224/16225H01L2224/20H01L2224/32145H01L2224/73253H01L2224/73259H01L2224/97H01L2225/06517H01L2225/06548H01L2225/06572H01L2924/00014H01L2924/014H01L2924/01004H01L2924/01005H01L2924/01006H01L2924/01013H01L2924/01029H01L2924/01032H01L2924/01047H01L2924/01049H01L2924/01073H01L2924/01074H01L2924/01079H01L2924/01082H01L2924/01322H01L2924/12041H01L2924/12042H01L2924/1306H01L2924/13091H01L2924/14H01L2924/15311H01L2924/181
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,824,975
App. No.
14/612,075
Granted
Nov 21, 2017
Kind
B2
Abstract

A semiconductor device comprises a first semiconductor die. An encapsulant is disposed around the first semiconductor die. A first stepped interconnect structure is disposed over a first surface of the encapsulant. An opening is formed in the first stepped interconnect structure. The opening in the first stepped interconnect structure is over the first semiconductor die. A second semiconductor die is disposed in the opening of the first stepped interconnect structure. A second stepped interconnect structure is disposed over the first stepped interconnect structure. A conductive pillar is formed through the encapsulant.

Claims (46)

1. A method of making a semiconductor device, comprising:

providing a first semiconductor die;

depositing an encapsulant around the first semiconductor die;

forming a first stepped interconnect structure over a surface of the encapsulant by,

(a) forming an insulating layer, and

(b) forming a conductive via through the insulating layer; and

forming an opening in the insulating layer of the first stepped interconnect structure, wherein the opening extends through the insulating layer over the first semiconductor die.

2. The method of claim 1 , further including disposing a second semiconductor die in the opening of the first stepped interconnect structure.

3. The method of claim 1 , further including disposing a second stepped interconnect structure over the first stepped interconnect structure.

4. The method of claim 1 , further including forming a conductive pillar through the encapsulant.

5. The method of claim 1 , wherein forming the first stepped interconnect structure further includes:

providing a pre-formed interconnect substrate; and

disposing the pre-formed interconnect substrate over the surface of the encapsulant.

6. A semiconductor device, comprising:

a first semiconductor die;

an encapsulant disposed around the first semiconductor die; and

a first stepped electrical interconnect structure disposed over a surface of the encapsulant, wherein the first stepped electrical interconnect structure includes,

(a) an insulating layer, and

(b) a conductive via formed through the insulating layer with an opening in the insulating layer of the first stepped electrical interconnect structure, wherein the opening extends through the insulating layer to the surface of the encapsulant over the first semiconductor die.

7. The semiconductor device of claim 6 , further including a second semiconductor die disposed in the opening of the insulating layer of the first stepped electrical interconnect structure.

8. The semiconductor device of claim 6 , further including a second stepped electrical interconnect structure disposed over the first stepped electrical interconnect structure.

9. The semiconductor device of claim 6 , further including a conductive pillar formed through the encapsulant.

10. A semiconductor device, comprising:

a first semiconductor die;

an encapsulant disposed around the first semiconductor die; and

a first stepped interconnect structure disposed over the encapsulant, wherein the first stepped interconnect structure includes,

(a) an insulating layer, and

(b) a conductive via formed through the insulating layer with an opening formed in the insulating layer of the first stepped interconnect structure, wherein the opening extends through the insulating layer over the first semiconductor die.

11. The semiconductor device of claim 10 , further including a conductive pillar formed through the encapsulant.

12. The semiconductor device of claim 10 , further including a second stepped interconnect structure disposed over the first stepped interconnect structure.

13. The semiconductor device of claim 10 , further including a second semiconductor die disposed in the opening of the insulating layer of the first stepped interconnect structure.

14. The semiconductor device of claim 13 , further including a third semiconductor die disposed over the first stepped interconnect structure and second semiconductor die.

15. The semiconductor device of claim 10 , wherein the first stepped interconnect structure includes a pre-formed interconnect substrate disposed over the encapsulant.

16. The semiconductor device of claim 6 , wherein the first stepped electrical interconnect structure includes a pre-formed interconnect substrate disposed over the encapsulant.

17. The semiconductor device of claim 7 , further including a third semiconductor die disposed over the first stepped electrical interconnect structure and second semiconductor die.

18. A semiconductor device, comprising:

a first semiconductor die;

an encapsulant deposited around the first semiconductor die; and

a first interconnect structure formed over a surface of the encapsulant, wherein the first interconnect structure includes,

(a) an insulating layer, and

(b) a conductive via formed through the insulating layer with an opening in the insulating layer of the first interconnect structure, wherein the opening extends through the insulating layer to the surface of the encapsulant.

19. The semiconductor device of claim 18 , further including a second semiconductor die disposed in the opening of the first interconnect structure.

20. The semiconductor device of claim 19 , further including a third semiconductor die disposed over the first interconnect structure and second semiconductor die.

21. The semiconductor device of claim 18 , further including a second interconnect structure disposed over the first interconnect structure.

22. The semiconductor device of claim 18 , further including a conductive pillar formed through the encapsulant.

23. The semiconductor device of claim 18 , wherein the first interconnect structure includes a pre-formed interconnect substrate disposed over the surface of the encapsulant.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 039514 FRAME: 0451. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Aug 26, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 039980/0838 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0442 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (3)
Continuation 13349510 · Jan 12, 2012
Division 12870696 · Aug 27, 2010
Related Publication 20150145128A1 · May 28, 2015