Semiconductor device and method of forming FO-WLCSP with multiple encapsulants
View Patent ↗A semiconductor device has a first semiconductor die including TSVs mounted to a carrier with a thermally releasable layer. A first encapsulant having a first coefficient of thermal expansion CTE is deposited over the first semiconductor die. The first encapsulant includes an elevated portion in a periphery of the first encapsulant that reduces warpage. A surface of the TSVs is exposed. A second semiconductor die is mounted to the surface of the TSVs and forms a gap between the first and second semiconductor die. A second encapsulant having a second CTE is deposited over the first and second semiconductor die and within the gap. The first CTE is greater than the second CTE. In one embodiment, the first and second encapsulants are formed in a chase mold. An interconnect structure is formed over the first and second semiconductor die.
1. A method of making a semiconductor device, comprising:
providing a first semiconductor die including conductive vias;
depositing a first encapsulant including a first coefficient of thermal expansion (CTE) over the first semiconductor die;
disposing a second semiconductor die over the conductive vias; and
depositing a second encapsulant including a second CTE over the first semiconductor die and second semiconductor die.
2. The method of claim 1 , further including forming the first and second encapsulants over and around the first and second semiconductor die with a chase mold.
3. The method of claim 1 , further including forming the first encapsulant comprising an elevated portion in a periphery of the first encapsulant to reduce warpage.
4. The method of claim 1 , further including:
removing a portion of the first semiconductor die to expose a surface of the first semiconductor die and to offset the surface of the first semiconductor die with respect to a surface of the first encapsulant;
forming a gap between the first and second semiconductor die by disposing the second semiconductor die over the surface of the first semiconductor die; and
depositing the second encapsulant in the gap between the first and second semiconductor die.
5. The method of claim 1 , wherein the first CTE is greater than the second CTE.
6. A method of making a semiconductor device, comprising:
providing a substrate;
depositing a first encapsulant including a first coefficient of thermal expansion (CTE) over the substrate;
removing a first portion of the first encapsulant; and
depositing a second encapsulant including a second CTE in contact with a remaining portion of the first encapsulant.
7. The method of claim 6 , further including:
forming a plurality of conductive vias through the substrate;
removing a portion of the substrate to the conductive vias; and
disposing a semiconductor die over the conductive vias.
8. The method of claim 7 , further including:
depositing the second encapsulant between the substrate and semiconductor die.
9. The method of claim 7 , further including forming the first encapsulant comprising an elevated portion around the semiconductor die.
10. The method of claim 6 , further including disposing the substrate over a thermally releasable layer.
11. The method of claim 6 , further including forming the first and second encapsulants over and around the substrate within a chase mold.
12. The method of claim 11 , wherein the first CTE is greater than the second CTE.
13. A method of making a semiconductor device, comprising:
providing a substrate;
disposing a first encapsulant over the substrate;
removing a portion of the first encapsulant to the substrate; and
disposing a second encapsulant on the first encapsulant to reduce warpage by forming the first and second encapsulants over and around the substrate within a chase mold.
14. The method of claim 13 , further including:
forming a conductive via through the substrate;
removing a portion of the substrate to the conductive via; and
disposing a semiconductor die over the conductive via.
15. The method of claim 14 , further including:
depositing the second encapsulant between the substrate and semiconductor die.
16. The method of claim 13 , further including forming the first encapsulant comprising an elevated portion.
17. The method of claim 13 , further including disposing the substrate over a thermally releasable layer.
18. The method of claim 13 , wherein the first encapsulant includes a first coefficient of thermal expansion (CTE) and the second encapsulant includes a second CTE that is less than the first CTE.
19. The method of claim 13 , further including forming an interconnect structure over the substrate and first encapsulant.
20. A semiconductor device, comprising:
a substrate;
a first encapsulant including a first coefficient of thermal expansion (CTE) deposited over the substrate; and
a second encapsulant including a second CTE disposed over the first encapsulant, wherein the first CTE is greater than the second CTE.
21. The semiconductor device of claim 20 , wherein the first encapsulant includes an elevated portion.
22. The semiconductor device of claim 20 , further including:
a semiconductor die disposed over the substrate
with a portion of the second encapsulant disposed between the substrate and semiconductor die.
23. The semiconductor device of claim 20 , wherein:
the first encapsulant includes a first filler content;
the second encapsulant includes a second filler content.
24. The semiconductor device of claim 20 , further including an interconnect structure formed over the substrate and first encapsulant.