IP Library Granted Patent US 9,368,563
Granted Patent B2
US 9,368,563 · App. 14/092,304 · Granted Jun 14, 2016

Semiconductor device including integrated passive device formed over semiconductor die with conductive bridge and fan-out redistribution layer

Inventors: Yaojian Lin (Singapore, SG); Kai Liu (Phoenix, AZ); Kang Chen (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L28/10H01L21/561H01L23/3121H01L23/3128H01L23/5223H01L23/5227H01L23/5389H01L24/19H01L24/20H01L24/96H01L24/97H01L25/16H01L21/568H01L23/49816H01L2224/12105H01L2224/24137H01L2224/24195H01L2224/48091H01L2224/73265H01L2924/014H01L2924/01006H01L2924/01029H01L2924/01073H01L2924/01074H01L2924/01322H01L2924/1206H01L2924/12041H01L2924/12042H01L2924/1306H01L2924/13091H01L2924/181H01L2924/19042H01L2924/30107H03H2001/0078
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Quick Facts
Patent No.
US 9,368,563
App. No.
14/092,304
Granted
Jun 14, 2016
Kind
B2
Abstract

A semiconductor device has a first semiconductor die. A first inductor is formed over the first semiconductor die. A second inductor is formed over the first inductor and aligned with the first inductor. An insulating layer is formed over the first semiconductor die and the first and second inductors. A conductive bridge is formed over the insulating layer and electrically connected between the second inductor and the first semiconductor die. In one embodiment, the semiconductor device has a second semiconductor die and a conductive layer is formed between the first and second semiconductor die. In another embodiment, a capacitor is formed over the first semiconductor die. In another embodiment, the insulating layer has a first thickness over a footprint of the first semiconductor die and a second thickness less than the first thickness outside the footprint of the first semiconductor die.

Claims (56)

1. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a first insulating layer over the semiconductor die;

forming a first inductor on a surface of the first insulating layer;

forming a first conductive layer over the surface of the first insulating layer;

forming a second insulating layer over the first insulating layer, first inductor, and first conductive layer;

depositing an encapsulant over the semiconductor die and around a side surface of the first insulating layer and a side surface of the second insulating layer; and

forming an interconnect structure over the semiconductor die and first inductor, wherein the interconnect structure includes a conductive bridge formed over the second insulating layer and coupled between the first inductor and first conductive layer.

2. The method of claim 1 , further including forming a second inductor aligned with the first inductor.

3. The method of claim 1 , further including forming a third insulating layer over the second insulating layer and encapsulant with a first thickness over the encapsulant and a second thickness greater than the first thickness over the second insulating layer.

4. A method of making a semiconductor device, comprising:

providing a semiconductor substrate;

forming a first insulating layer over the semiconductor substrate;

disposing a first conductive layer over the first insulating layer with a first portion of the first conductive layer being wound to form an inductor;

forming a second insulating layer over the first insulating layer and first conductive layer;

depositing an encapsulant over the semiconductor substrate and first insulating layer and around a side surface of the second insulating layer; and

forming an interconnect structure over the semiconductor substrate and first conductive layer, wherein the interconnect structure includes a conductive bridge formed over the second insulating layer and coupled between the inductor and a second portion of the first conductive layer.

5. The method of claim 4 , further including disposing a semiconductor die adjacent to the semiconductor substrate.

6. The method of claim 4 , further including forming a third insulating layer over the second insulating layer and encapsulant.

7. The method of claim 6 , wherein the third insulating layer includes a first thickness over the encapsulant and a second thickness greater than the first thickness over the second insulating layer.

8. A semiconductor device, comprising:

a semiconductor substrate;

a first insulating layer formed over the semiconductor substrate;

a first conductive layer disposed over the first insulating layer, wherein a first portion of the first conductive layer is wound to form a first inductor;

a second insulating layer formed over the first insulating layer and first conductive layer;

an encapsulant deposited over the semiconductor substrate and around a side surface of the first insulating layer and a side surface of the second insulating layer; and

an interconnect structure formed over the semiconductor substrate and first conductive layer, wherein the interconnect structure includes a conductive bridge formed over the second insulating layer and coupled between the first inductor and a second portion of the first conductive layer.

9. The semiconductor device of claim 8 , further including a third insulating layer formed over the second insulating layer and encapsulant, wherein the third insulating layer includes a first thickness over the encapsulant and a second thickness greater than the first thickness over the second insulating layer.

10. The semiconductor device of claim 8 , wherein a portion of the first conductive layer extends vertically through an opening in the first insulating layer.

11. The semiconductor device of claim 8 , further including a semiconductor die disposed adjacent to the semiconductor substrate.

12. A semiconductor device, comprising:

a first semiconductor die;

a first insulating layer formed over the first semiconductor die;

a first inductor formed on a surface of the first insulating layer;

a first conductive layer formed over the surface of the first insulating layer;

a second insulating layer formed over the first insulating layer, first inductor, and first conductive layer;

an encapsulant deposited over the first semiconductor die and first insulating layer and around a side surface of the second insulating layer; and

an interconnect structure formed over the first semiconductor die and first inductor, wherein the interconnect structure includes a conductive bridge formed over the second insulating layer and coupled between the first inductor and first conductive layer.

13. The semiconductor device of claim 12 , further including a second semiconductor die disposed adjacent to the first semiconductor die.

14. The semiconductor device of claim 12 , further including a third insulating layer formed over the second insulating layer and encapsulant, wherein the third insulating layer includes a first thickness over the encapsulant and a second thickness greater than the first thickness over the second insulating layer.

15. The semiconductor device of claim 12 , further including a passive device disposed over the first semiconductor die.

16. The semiconductor device of claim 12 , further including a second inductor aligned with the first inductor.

17. The semiconductor device of claim 8 , further including a second inductor aligned with the first inductor.

18. The semiconductor device of claim 8 , further including a passive device disposed over the semiconductor substrate.

19. A semiconductor device, comprising:

a first semiconductor die;

a first insulating layer formed over the first semiconductor die;

a first inductor formed on a surface of the first insulating layer;

a second insulating layer formed over the first insulating layer and first inductor;

an encapsulant deposited around the first semiconductor die, first insulating layer, and second insulating layer; and

an interconnect structure formed over the first semiconductor die and first inductor.

20. The semiconductor device of claim 19 , further including a first conductive layer formed over the surface of the first insulating layer, wherein the interconnect structure includes a conductive bridge formed over the second insulating layer and coupled between the first inductor and first conductive layer.

21. The semiconductor device of claim 19 , further including a second semiconductor die disposed adjacent to the first semiconductor die.

22. The semiconductor device of claim 19 , further including a passive device disposed over the first semiconductor die.

23. The semiconductor device of claim 19 , further including a third insulating layer formed over the second insulating layer and encapsulant, wherein the third insulating layer includes a first thickness over the encapsulant and a second thickness greater than the first thickness over the second insulating layer.

24. The semiconductor device of claim 19 , further including a second inductor aligned with the first inductor.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064809/0877 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0391 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (3)
Continuation 13311266 · Dec 5, 2011
Provisional Application 61426186 · Dec 22, 2010
Related Publication 20140084415A1 · Mar 27, 2014