Circuit for detecting bonding defect in multi-bonding wire
View Patent ↗An integrated circuit for detecting a bonding defect in a multi-bonding wire. The integrated circuit includes a plurality of pads each connectable by a bonding wire to a lead terminal. Voltage supplied to the lead terminal is applied in common to the plurality of pads. A detection circuit is operably connected to the plurality of pads. The detection circuit detects breakage of the bonding wires based on potentials at the plurality of pads.
1. An integrated circuit for connection to a lead terminal that is supplied with voltage, the integrated circuit comprising:
a plurality of pads each connectable by a bonding wire to the lead terminal, wherein voltage that is supplied to the lead terminal is commonly applied to the plurality of pads;
a detection circuit including a logic gate that is operably connected to the plurality of pads, wherein the detection circuit detects potentials at the plurality of pads in order to detect breakage of the bonding wires based on the detected potentials;
a plurality of power transistors respectively connected to the plurality of pads; and
a plurality of switch elements arranged between the plurality of pads and the logic gate, wherein the plurality of switch elements respectively connect the plurality of pads to the logic gate and are substantially simultaneously activated by a test mode signal.
2. The integrated circuit according to claim 1 , wherein the integrated circuit functions in a normal mode and a test mode, with the detection circuit being inactive in the normal mode and active in the test mode.
3. The integrated circuit according to claim 1 , wherein the detection circuit detects breakage of the bonding wires when the plurality of power transistors are deactivated.
4. The integrated circuit according to claim 1 , wherein the logic gate is an AND gate.
5. The integrated circuit according to claim 1 , wherein high power supply voltage is supplied to the lead terminal and is commonly applied to the plurality of pads.
6. The integrated circuit of claim 1 , wherein the plurality of power transistors comprise NMOS devices having drain terminals connected to respective ones of the plurality of pads.
7. An integrated circuit for connection to a lead terminal that is supplied with voltage, the integrated circuit comprising:
a first pad connectable to the lead terminal by a first wire;
a second pad connectable to the lead terminal by a second wire, with voltage that is supplied to the lead terminal being commonly applied to the first and second pads;
a detection circuit including a first input terminal and a second input terminal;
a first switch element connected between the first pad and the first input terminal of the detection circuit; and
a second switch element connected between the second pad and the second input terminal of the detection circuit, with the first and second switch elements being simultaneously activated in a test mode;
wherein the detection circuit detects breakage of at least one of the first and second wires in the test mode based on potential at the first pad and potential at the second pad.