Methods for forming metal-germanide layers and devices obtained thereby

1. A method for forming a layer in a semiconductor device, the metal germanide layer comprising nickel, the method comprising:

providing a substrate on which at least one area of a germanium layer is exposed,

depositing over the substrate and said germanium area, a metal comprising nickel,

forming over said metal, a capping layer consisting of a silicon oxide containing layer, or of a silicon nitride layer,

then thermally annealing for formation of the metal germanide comprising nickel at a first annealing temperature in the range of about 200° C. to about 550° C.,

then removing selectively said capping layer and any unreacted metal,

wherein the capping layer is formed at a temperature that is lower than the first annealing temperature.

2. A method according to claim 1 further comprising a second annealing step after removal of said unreacted metal, the second annealing step being performed at a second annealing temperature.

3. A method according to claim 1 , wherein, on said substrate, said Ge layer contacts another exposed area of a material selected from the group consisting of a dielectric material, a metal, a polymer capable of withstanding required process temperatures, and wherein said different exposed materials do not react with Ni.

4. A method according to claim 3 , wherein said other exposed material is SiO 2 .

5. A method according to claim 4 , wherein said dielectric material is used for or in the form of a field isolation region or a spacer.

6. A method according to claim 1 , wherein said annealing step(s) consist(s) of Rapid Thermal Process (RTP) step(s).

7. A method according to claim 1 , wherein said annealing step(s) is/are performed in a batch furnace.

8. A method according to claim 6 or 7 , wherein said annealing step(s) is/are performed in an inert ambient.

9. A method according to claim 1 , wherein said capping layer is deposited by a CVD technique or by a spin-on deposition technique.

10. A method according to claim 1 , wherein said silicon nitride capping layer is deposited by a PECVD technique.

11. A method according to claim 1 , wherein said capping layer is less than 100 nm thick.

12. A method according to claim 1 , wherein said step of removing said capping layer is a wet process step.

13. A method according to claim 1 , wherein said step of removing the unreacted metal is a wet process step.

14. A method according to claim 1 , wherein said step of removing said capping layer and wherein said step of removing the unreacted metal are performed simultaneously.

15. A method according to claim 1 , wherein said metal for germanidation consists of Ni.

16. A method according to claim 1 , wherein said metal for germanidation further comprises cobalt, platinum and/or palladium.

17. A method according to claim 1 , wherein said metal comprises 90% nickel and 10% palladium.

18. A method according to claim 1 , wherein the temperature used for said capping layer formation is lower than 300° C.

19. A method according to claim 1 wherein said annealing temperature(s) is/are higher than 300° C.

20. A method according to claim 1 wherein the first annealing temperature is in the range of 300° C. to 450° C.

21. A semiconductor device made by a method according to claim 1 .

22. A method according to claim 1 , wherein the capping layer consists essentially of silicon dioxide.

23. A method according to claim 2 , wherein the second annealing temperature is in the range of about 300° C. to about 550° C.

24. A method according to claim 1 , wherein the first annealing temperature is in the range of about 300° C. to about 550° C.

25. A method according to claim 1 , wherein the first annealing temperature is in the range of about 200° C. to about 400° C.