Flip chip for electrical function test and manufacturing method thereof
View Patent ↗Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.
1. A flip chip comprising:
an insulating layer arranged on and directly contacted with a substrate, wherein the insulating layer covers the substrate;
a metal patterned seed layer arranged on the insulating layer and directly contacted with the insulating layer; and
a plate bump layer formed on the metal patterned seed layer, wherein one or more plate bumps are formed;
wherein a metal pattern is formed at a side of the plate bump, and is formed by patterning the metal patterned seed layer; wherein the metal pattern is at least a part of the metal patterned seed layer, and forms electrical connection between the plate bumps.
2. The flip chip as claimed in claim 1 , wherein the substrate is one selected from the group consisting of a silicon wafer, a compound semiconductor, quartz, glass, and ceramic material.
3. The flip chip as claimed in claim 1 , wherein the insulating layer comprises SiO 2 or Si 3 N 4 .
4. The flip chip as claimed in claim 1 , wherein the seed layer comprises an adhesive layer and an electrode layer.
5. The flip chip as claimed in claim 4 , wherein the adhesive layer comprises titanium, and the electrode layer comprises copper or gold.
6. A flip chip manufacturing method comprising:
(a) forming a seed layer on a substrate by using a conductive thin layer;
(b) applying and patterning a photoresist or a dry film;
(c) forming gold bumps by electroplating;
(d) patterning the seed layer to form a metal pattern;
(e) forming an insulating layer on the seed layer and the upper end of the gold bumps; and
(f) applying and patterning a photoresist or a dry film so as to pattern the insulating layer;
wherein the metal pattern forms electrical connection between the gold bumps, and the polarity of the photoresist or a dry film in step b) is opposite to the polarity of photoresist or a dry film in step f).
7. The flip chip manufacturing method as claimed in claim 6 , wherein the patterning of steps (b) and (f) are performed by photolithography.
8. The flip chip manufacturing method as claimed in claim 7 , wherein a photolithography mask used in the patterning processes of step (b) is the same as that of step (f).
9. The flip chip manufacturing method as claimed in claim 6 , wherein the patterning process of step (d) comprises applying and patterning a photoresist or a dry film and etching a portion of the conductive thin film on which portion the photoresist or the dry film is not, so as to form a metal pattern for electrical connection between gold bumps.