IP Library Patent Application 12212690
Patent Application
App. No. 12/212,690

METHOD OF MANUFACTURING INTERCONNECT SUBSTRATE AND SEMICONDUCTOR DEVICE

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Quick Facts
Patent No.
US None
App. No.
12/212,690
Abstract

An interconnect substrate includes an interconnect, an insulating layer, a non-photosensitive resin layer, a photosensitive resin layer, a first electrode pad, and a second electrode pad. The non-photosensitive resin layer is constructed with a non-photosensitive insulating material. Also, the non-photosensitive resin layer has a first opening. The photosensitive resin layer is constructed with a photosensitive insulating material. Also, the photosensitive resin layer has a second opening. The opening area of the second opening is larger than that of the first opening. The first electrode pad is disposed on the first surface side of the insulating layer. The first electrode pad is exposed to the first opening. The second electrode pad is disposed on the second surface side of the insulating layer. The second electrode pad is exposed to the second opening.

Claims (24)

1 . A method of manufacturing an interconnect substrate, comprising:

forming a first layer constructed with a non-photosensitive insulating material on a supporting substrate;

forming a first electrode pad on said first layer;

forming an interconnect and an insulating layer covering said interconnect on said first electrode pad;

forming a second electrode pad on said insulating layer;

forming a second layer constructed with a photosensitive insulating material so as to cover said second electrode pad;

forming a second opening in said second layer so that said second electrode pad is exposed;

removing said supporting substrate after forming said second opening; and

forming a first opening in said first layer after removing said supporting substrate so that said first electrode pad is exposed, said first opening having an opening area smaller than that of said second opening.

2 . The method of manufacturing an interconnect substrate as set forth in claim 1 ,

wherein in said forming of said second opening, said second opening is formed by photolithography method, and

in said forming of said first opening, said first opening is formed by laser processing.

3 . The method of manufacturing an interconnect substrate as set forth in claim 1 ,

wherein, in said forming of said first layer, a non-photosensitive insulating film is bonded, as said first layer, onto said supporting substrate through an intermediary of an insulating adhesive.

4 . A method of manufacturing a semiconductor device, comprising:

forming a first layer constructed with a non-photosensitive insulating material on a supporting substrate;

forming a first electrode pad on said first layer;

forming an interconnect and an insulating layer covering said interconnect on said first electrode pad;

forming a second electrode pad on said insulating layer;

forming a second layer constructed with a photosensitive insulating material so as to cover said second electrode pad;

forming a second opening in said second layer so that said second electrode pad is exposed;

removing said supporting substrate after forming said second opening;

forming a first opening in said first layer after removing said supporting substrate so that said first electrode pad is exposed, said first opening having an opening area smaller than that of said second opening; and

connecting a semiconductor chip to said first electrode pad that is exposed to said first opening.

Assignments (2)
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0304 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2008
From: HONDA, HIROKAZU
To: NEC ELECTRONICS CORPORATION
Reel/Frame 021546/0943 →