Semiconductor package embedded in substrate, system including the same and associated methods
A device includes a base substrate, a package including an encapsulated die, the package at least partially embedded in the base substrate, and a wiring portion on the package and extending across at least a portion of the base substrate adjacent to the package.
1. A device, comprising:
a base substrate;
a package including a die fixed to a package substrate, the package substrate electrically connected to the die, the die and the package substrate being encapsulated by an encapsulant in the package, the package at least partially embedded in the base substrate; and
a wiring portion on the package and extending across at least a portion of the base substrate adjacent to the package, wherein:
a wiring layer in the wiring portion is electrically connected to the package,
the base substrate has a cavity therein that is at least as large as the encapsulated die and package substrate,
the wiring portion further includes an insulating material disposed on the bottom surface of the package, the bottom surface facing away from the cavity, and
the insulating material is disposed in the cavity in a space between the encapsulated die and package substrate and the sidewalls of the base substrate.
2. The device as claimed in claim 1 , wherein the package in a bottom-up orientation is embedded in the base substrate, such that an active side of the die faces away from the wiring portion, and
the wiring layer is electrically connected to bonding pads on the bottom of the package.
3. The device as claimed in claim 2 , wherein the wiring portion includes:
a plurality of openings aligned with bonding pads on the bottom of the package, and
a conductive material disposed in the openings and electrically connecting the bonding pads to the wiring layer.
4. The device as claimed in claim 2 , wherein the wiring portion includes:
a metal pattern electrically connecting bonding pads on the bottom of the package to the wiring layer, and
a solder resist covering the metal pattern, the solder resist forming an exposed surface of the device.
5. The device as claimed in claim 1 , further comprising a least one wiring layer embedded in the base substrate below the wiring portion, the wiring portion electrically connecting the at least one wiring layer to the package.
6. The device as claimed in claim 1 , further comprising another die in the package, the other die being stacked on the die and electrically connected to the wiring portion.
7. The device as claimed in claim 1 , further comprising a second package embedded in the base substrate, wherein the wiring portion is electrically connected to the package and the second package.
8. The device as claimed in claim 1 , further comprising a second package disposed between the wiring portion and the package.
9. The device as claimed in claim 1 , further comprising another die disposed on the package.
10. The device as claimed in claim 9 , wherein:
an insulation layer covers the other die and the package, and
a wiring pattern is formed on the insulation layer and is electrically connected to the other die and the package.
11. The device as claimed in claim 10 , wherein the package includes a plurality of peripheral bonding pads in a peripheral region thereof, and
the other die is disposed in an area bounded by the peripheral bonding pads.
12. The device as claimed in claim 11 , wherein the insulation layer includes openings aligned with the peripheral bonding pads, and
a conductive material is disposed in the openings and electrically connects the peripheral bonding pads to a wiring layer in the wiring portion.
13. The device as claimed in claim 9 , wherein the wiring portion is between the other die and the package.
14. The device as claimed in claim 13 , wherein the other die is connected to the wiring portion by bond wires attached to an upper side of the other die.
15. The device as claimed in claim 1 , further comprising a second package, wherein:
the wiring portion is disposed between the second package and the package, and
the second package is connected to the wiring portion by solder bumps disposed on a lower side of the second package.
16. The device as claimed in claim 1 , wherein:
the package is embedded in a cavity in the base substrate, and
the cavity has a height that is less than a height of the base substrate.
17. The device as claimed in claim 1 , wherein:
the package is embedded in a cavity in the base substrate, and
the cavity extends through an entire thickness of the base substrate.
18. The device as claimed in claim 17 , further comprising a layer on a lower side of the base substrate, the layer extending across the cavity so as to enclose a lower portion of the cavity.
19. A device, comprising:
a base substrate;
a package including a die fixed to a package substrate, the package substrate electrically connected to the die, the die and the package substrate being encapsulated by an encapsulant in the package, the package at least partially embedded in the base substrate;
a wiring portion on the package and extending across at least a portion of the base substrate adjacent to the package, and
another die disposed on the package, wherein:
an insulation layer covers the other die and the package,
a wiring pattern is formed on the insulation layer and is electrically connected to the other die and the package,
the package includes a plurality of peripheral bonding pads in a peripheral region thereof, and
the other die is disposed in an area bounded by the peripheral bonding pads.