IP Library Granted Patent US 7,755,428
Granted Patent B2
US 7,755,428 · App. 12/230,065 · Granted Jul 13, 2010

Amplifying circuit

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Quick Facts
Patent No.
US 7,755,428
App. No.
12/230,065
Granted
Jul 13, 2010
Kind
B2
Abstract

An amplifying circuit comprising an output stage circuit composed of a first and a second output transistor and operating as a class AB push-pull circuit reduces electricity consumed by an idle current. A pre-stage circuit outputs a first and a second control signal, and controls a channel current of the first and the second output transistor. In a period in which one control signal causes the corresponding output transistor to operate in class AB mode, the other control signal places the corresponding output transistor in a cutoff state.

Claims (21)

1. An amplifying circuit, comprising:

an output stage circuit provided with a first output transistor for controlling a conducting current based on a first control signal and a second output transistor for controlling a conducting current based on a second control signal, the transistors causing the output stage circuit to operate as a class AB push-pull circuit; and

a pre-stage circuit, in which the first control signal and the second control signal are generated in accordance with an input signal;

wherein,

the first control signal causes the first output transistor to operate in class AB mode in a first ON period set in accordance with a positive signal period in which the input signal is positive, and places the first output transistor in a cutoff state in a first OFF period set in accordance with a negative signal period in which the input signal is negative; and

the second control signal causes the second output transistor to operate in class AB mode in a second ON period set in accordance with the negative signal period, and places the second output transistor into a cutoff state in a second OFF period set in accordance with the positive signal period,

the pre-stage circuit comprising:

a first control circuit for generating, based on the input signal, a first original control signal, which makes the first output transistor operate in class AB mode, the first control circuit being capable of impressing the first original control signal as a control signal on the first output transistor;

a second control circuit for generating, based on the input signal, a second original control signal, which makes the second output transistor operate in class AB mode, the second control circuit being capable of impressing the second original control signal as a control signal on the second output transistor;

a second output transistor cutoff circuit for operating in the second OFF period based on the first original control signal, and for setting the control signal impressed on the second output transistor to a cutoff voltage; and

a first output transistor cutoff circuit for operating in the first OFF period based on the second original control signal, and for setting the control signal impressed on the first output transistor to a cutoff voltage.

2. An amplifying circuit, comprising:

an output stage circuit provided with a first output transistor for controlling a conducting current based on a first control signal and a second output transistor for controlling a conducting current based on a second control signal, the transistors causing the output stage circuit to operate as a class AB push-pull circuit; and

a pre-stage circuit, in which the first control signal and the second control signal are generated in accordance with an input signal;

wherein,

the first control signal causes the first output transistor to operate in class AB mode in a first ON period set in accordance with a positive signal period in which the input signal is positive, and places the first output transistor in a cutoff state in a first OFF period set in accordance with a negative signal period in which the input signal is negative; and

the second control signal causes the second output transistor to operate in class AB mode in a second ON period set in accordance with the negative signal period, and places the second output transistor into a cutoff state in a second OFF period set in accordance with the positive signal period;

an auxiliary output stage circuit that is a push-pull circuit provided on an output terminal of the output stage circuit in parallel to the output stage circuit; and

an auxiliary pre-stage circuit for causing the auxiliary output stage circuit to operate in class AB mode in accordance with the input signal, and for causing the auxiliary output stage circuit to generate an output signal to the output terminal that is in phase with an output signal generated by the output stage circuit;

wherein

the auxiliary output stage circuit has a lower load driving capability than the output stage circuit.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033813 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 21, 2015
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034816/0510 →
CHANGE OF NAME Recorded Dec 3, 2014
From: SANYO SEMICONDUCTOR CO., LTD
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 034537/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033813/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2008
From: OGATA, TAKASHIGE
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 021775/0091 →