IP Library Granted Patent US 8,415,203
Granted Patent B2
US 8,415,203 · App. 12/240,509 · Granted Apr 9, 2013

Method of forming a semiconductor package including two devices

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Quick Facts
Patent No.
US 8,415,203
App. No.
12/240,509
Granted
Apr 9, 2013
Kind
B2
Abstract

A method of forming a semiconductor package includes providing a carrier, attaching a first surface of a first device on the carrier, wherein the first surface comprises a first active surface of the first device, and attaching a second surface of a second device on the carrier. In one embodiment, the second surface is opposite a third surface of the second semiconductor die and the third surface comprises a second active surface. A first insulating material can be formed between the first device and the second device.

Claims (54)

1. A method comprising:

providing a carrier;

providing a first device having a first major surface and a second major surface, the first major surface comprising an active surface including a sensor, an active display, or a microelectromechanical device;

providing a second device having a first major surface and a second major surface, the first major surface comprising an active surface;

attaching the first major surface of the first device to the carrier;

attaching the second major surface of the second device to the carrier, the first major surface of the first device coplanar with the second major surface of the second device;

forming a first through-via extending from the second major surface of the first device towards the first major surface of the first device and electrically coupled to circuitry of the active surface of the first device;

forming a first insulating material between minor surfaces of the first device and the second device;

forming a second insulating material over the entirety of the first device and the second device;

forming a first via in the second insulating material, the first via electrically coupled to the first through-via;

forming a second via in the second insulating material, the second via electrically coupled to circuitry at the active surface of the second device;

electrically coupling a first terminal to the first via;

electrically coupling a second terminal to the second via; and

removing at least a portion of the carrier to expose at least a portion of the active surface of the first device.

2. The method of claim 1 , wherein removing comprises etching.

3. The method of claim 1 , where removing comprises using light or heat.

4. The method of claim 1 , wherein removing occurs after electrically coupling the first terminal to the first via.

5. The method of claim 1 , wherein the carrier is selected from a group consisting of: glass and tape.

6. The method of claim 1 , wherein the first terminal and the second terminal comprise solder balls.

7. The method of claim 1 , wherein in a finished semiconductor package, the active surface of the second device is not exposed.

8. The method of claim 1 , wherein the first insulating material is in direct contact with the first and second devices.

9. The method of claim 1 , further comprising:

forming a second through-via extending from the second major surface of the first device towards the first major surface of the first device and electrically coupled to circuitry of the active surface of the first device;

forming a third via in the second insulating material, the third via electrically coupled to the second through-via;

forming a fourth via in the second insulating material, the fourth via electrically coupled to circuitry at the active surface of the second device; and

electrically coupling the third and fourth vias to each other.

10. A method comprising:

providing a carrier;

providing a first device having a first major surface and a second major surface, the first major surface comprising an active surface including a sensor, an active display, or a microelectromechanical device;

providing a second device having a first major surface and a second major surface, the first major surface comprising an active surface;

attaching the first major surface of the first device to the carrier;

attaching the second major surface of the second device to the carrier, the first major surface of the first device coplanar with the second major surface of the second device;

forming a sacrificial layer over the active surface of the second device to protect the active surface during a subsequent processing step;

forming a first insulating material between minor surfaces of the first device and the second device;

forming a second insulating material over the entirety of the first device and the second device;

forming a first via in the second insulating material, the first via electrically coupled to a contact at the second major surface of the first device, the contact electrically coupled to circuitry at the active surface of the first device by a first through-via extending from the second major surface of the first device towards the first major surface of the first device, the first through via formed at the first device prior to attaching the first device to the carrier;

forming a second via in the insulating material, the second via electrically coupled to circuitry at the active surface of the second device;

electrically coupling a first terminal to the first via;

electrically coupling a second terminal to the second via; and

removing at least a portion of the carrier to expose at least a portion of the active surface of the first device.

11. The method of claim 10 , wherein

the active surface of the second device is not exposed.

12. The method of claim 10 , further comprising disposing a lens adjacent and optically coupled to the active surface of the first device.

13. The method of claim 10 , wherein the first insulating material is in direct contact with the first and second devices.

14. The method of claim 10 , wherein the first device is of a different type as compared to the second device.

15. The method of claim 10 , further comprising:

forming a third via in the second insulating material, the third via electrically coupled to circuitry at the active surface of the first device by a second through-via; and

forming a fourth via in the insulating material, the fourth via electrically coupled to circuitry at the active surface of the second device, wherein the third via is electrically coupled to the fourth via.

16. The method of claim 10 , wherein the entire carrier is removed.

17. The method of claim 10 , wherein the portion of the carrier that is removed is removed by etching.

18. The method of claim 10 , wherein the portion of the carrier that is removed is removed using light or heat.

19. The method of claim 10 , wherein the portion of the carrier that is removed is removed after electrically coupling the first terminal to the first via.

20. The method of claim 10 , wherein the carrier is selected from a group consisting of: glass and tape.

21. The method of claim 10 , wherein the first terminal and the second terminal comprise solder balls.

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0757 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Dec 9, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021936/0772 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2008
From: BURCH, KENNETH R.; MANGRUM, MARC A.; LYTLE, WILLIAM H.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 021606/0109 →