Semiconductor integrated circuit having a random number and oscillator circuit for variably controlling stored data
View Patent ↗The invention reduces unnecessary electromagnetic radiation noise due to an operation clock signal generated by an oscillator circuit. Random number data outputted by a random number generation circuit is stored in a frequency variable data register. The data stored in the frequency variable data register is replaced by random number data sequentially generated by the random number generation circuit. An oscillator circuit is a circuit generating a clock signal, and the clock signal is supplied as an operation clock signal to an internal circuit through an operation clock signal generation circuit. The frequency of the clock signal from the oscillator circuit is variably controlled in response to the random number data stored in the frequency variable data register. A frequency variable range control register which stores control data for controlling the range of the frequency variably controlled in response to the random number data stored in the frequency variable data register is further provided.
1. A semiconductor integrated circuit comprising:
a random number generation circuit generating random number data;
an oscillator circuit generating a clock signal; and
a first control register storing the random number data outputted by the random number generation circuit,
wherein the oscillation frequency of the clock signal is variably controlled in response to the random number data outputted by the random number generation circuit, and
the oscillation frequency of the clock signal generated by the oscillator circuit is variably controlled in response to the random number data stored in the first control register.
2. The semiconductor integrated circuit of claim 1 , further comprising a second control register storing control data for controlling a range of the oscillation frequency which is variably controlled in response to the random number data stored in the first control register.
3. The semiconductor integrated circuit of claim 1 , wherein the oscillator circuit comprises a ring oscillator comprising a plurality of inverters, a constant current source provided for each of the inverters and supplying an operation current to a corresponding inverter, and a current control circuit controlling currents of the constant current sources based on the random number data stored in the first control register.
4. The semiconductor integrated circuit of claim 1 , further comprising a pulse width modulation circuit generating a pulse width modulation signal in response to the random number data outputted by the random number generation circuit and a filter smoothing the pulse width modulation signal outputted by the pulse width modulation circuit, wherein the oscillator circuit is a voltage controlled oscillator circuit that controls the oscillation frequency of the clock signal in response to an output of the filter.
5. The semiconductor integrated circuit of claim 1
wherein the oscillator circuit uses the random number data so that the oscillation frequency forms a normal distribution.