IP Library Granted Patent US 8,068,797
Granted Patent B2
US 8,068,797 · App. 12/249,649 · Granted Nov 29, 2011

Gain control methods for wireless devices and transmitters

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Quick Facts
Patent No.
US 8,068,797
App. No.
12/249,649
Granted
Nov 29, 2011
Kind
B2
Abstract

A gain control process ( 1102 ) executed at a transmitter ( 500 ) generates ( 1314 ) a gain ramp signal ( 1206 ) having a delay component ( 1224 ) and a gain component ( 1226 ). The process ( 1102 ) further generates ( 1304 ) and incorporates ( 1306 ) a gain arc ( 1202 ) into a digital signal to form a digital gain signal ( 1204 ) having a digital gain change ( 1218 ). A combiner ( 502 ) combines a digital input signal ( 512 ) with the digital gain signal ( 1204 ) to generate a pre-compensated digital signal ( 516 ). A variable gain amplifier ( 508 ) applies a sequence of gains ( 1234,1236,1238,1240,1242 ) in the gain component ( 1126 ) of the gain ramp signal ( 1206 ) to a pre-adjusted analog signal ( 520 ) in order to generate a gain-adjusted analog signal ( 524 ). Application of the gain component ( 1126 ) and the digital gain change ( 1218 ) occurs when a portion ( 1212 ) of the gain arc ( 1202 ) indicates a low instantaneous signal power at an antenna ( 106 ) in order to reduce ACLR degradation.

Claims (48)

1. A method for performing gain control in a transmitter of a wireless device, said transmitter including a combiner and a variable gain amplifier, said method comprising:

generating a gain ramp signal that includes a delay component and a gain component, said gain component indicating a sequence of gains;

generating a gain arc, said gain arc exhibiting an arc duration, and a portion of said gain arc indicating a low instantaneous signal power level at an antenna of said wireless device;

incorporating said gain arc into a digital gain signal to form a composite digital gain signal;

receiving a digital input signal at said combiner;

combining said composite digital gain signal with said digital input signal at said combiner to generate a pre-compensated digital signal;

generating a pre-adjusted analog signal from said pre-compensated digital signal; and

applying said gain ramp signal to said pre-adjusted analog signal at said variable gain amplifier to generate a gain-adjusted analog signal for transmission from said wireless device, said applying operation occurring at an onset of said arc duration with an application of said delay component followed by said gain component such that application of said sequence of gains to said pre-adjusted analog signal occurs when said gain arc indicates said low instantaneous signal power.

2. A method as claimed in claim 1 wherein said generating said gain ramp signal comprises:

determining a gain transition for said gain component to be applied by said variable gain amplifier, said gain transition indicating an initial gain of said pre-adjusted analog signal and a final gain of said pre-adjusted analog signal; and

establishing a transition time period for said gain transition based on a time period for said portion of said gain arc indicating said low instantaneous signal power.

3. A method as claimed in claim 2 wherein said establishing operation establishes said transition time period as substantially equivalent to said time period for said portion of said gain arc that indicates said low instantaneous signal power level.

4. A method as claimed in claim 3 wherein each of said time period and said transition time period are substantially fifty percent of said arc duration.

5. A method as claimed in claim 1 wherein said variable gain amplifier is a stepped variable gain amplifier, said gains from said sequence of gains are applied as stepped gain transitions, and said generating said gain ramp signal comprises determining a step duration of each of said gains in response to a time period for said portion of said gain arc that indicates said low instantaneous signal power level.

6. A method as claimed in claim 1 wherein said generating said gain ramp signal includes establishing said delay component in response to said arc duration.

7. A method as claimed in claim 6 wherein said delay component is substantially twenty-five percent of said arc duration.

8. A method as claimed in claim 1 wherein said generating said gain arc comprises:

determining a gain transition for said gain component to be applied by said variable gain amplifier, said gain transition indicating an initial gain of said pre-adjusted analog signal and a final gain of said pre-adjusted analog signal; and

generating said gain arc as a sequence of digital values related to said sequence of gains of said gain component to be applied to achieve said gain transition.

9. A method as claimed in claim 1 wherein said generating said gain arc comprises generating said gain arc as a sequence of digital values calculated based on said arc duration and an arc depth.

10. A method as claimed in claim 1 wherein said generating said gain ramp signal comprises:

determining a digital gain change for said composite digital gain change; and

enabling said digital gain change to occur when said portion of said gain arc indicates said low instantaneous signal power.

11. A method as claimed in claim 1 wherein said transmitter further comprises a digital-to-analog conversion (DAC) block and a radio frequency (RF) modulator interposed between said combiner and said variable gain amplifier, and said method further comprises:

converting said pre-compensated digital signal into a pre-compensated analog signal by performing a digital-to-analog conversion process at said DAC block; and

modulating said pre-compensated analog signal to a radio frequency carrier frequency to generate said pre-adjusted analog signal.

12. A method as claimed in claim 1 where said transmitter further comprises a power amplifier interposed between said variable gain amplifier and said antenna, and said method further comprises:

receiving said gain-adjusted analog signal at said power amplifier from said variable gain amplifier;

amplifying said gain-adjusted analog signal at said power amplifier to generate an antenna output signal;

receiving said antenna output signal at said antenna from said power amplifier; and

transmitting said antenna output signal from said antenna over an air interface.

13. A transmitter of a wireless device comprising:

a controller adapted to generate a gain ramp signal that includes a delay component and a gain component, said gain component indicating a sequence of gains, said controller further being adapted to generate and incorporate a gain arc into a digital gain signal to form a composite digital gain signal, said gain arc including a sequence of digital values that defines an arc, said gain arc exhibiting an arc duration, and a portion of said gain arc indicating a low instantaneous signal power level at an antenna of said wireless device;

a combiner adapted to receive a digital input signal and said composite digital gain signal, and to combine said composite digital gain signal with said digital input signal to generate a pre-compensated digital signal; and

a variable gain amplifier adapted to apply said gain ramp signal to a pre-adjusted analog signal in order to generate a gain-adjusted analog signal, said pre-adjusted analog signal being generated from said pre-compensated digital signal, said gain ramp signal being applied at an onset of said arc duration with an application of said delay component followed by said gain component such that application of said sequence of gains to said pre-adjusted analog signal occurs when said gain arc indicates said low instantaneous signal power level.

14. A transmitter as claimed in claim 13 wherein said controller is adapted to generate said delay component based on said arc duration.

15. A transmitter as claimed in claim 13 wherein said controller is adapted to determine a gain transition for said gain component to be applied by said variable gain amplifier, said gain transition indicating an initial gain of said pre-adjusted analog signal and a final gain of said pre-adjusted analog signal, and establish a transition time period for said gain transition as being substantially equivalent to a time period for said portion of said gain arc that indicates said low instantaneous signal power level.

16. A transmitter as claimed in claim 13 wherein said controller is adapted to determine a digital gain change for said composite digital gain signal and enable said digital gain change to occur when said portion of said gain arc indicates said low instantaneous signal power.

17. A computer-readable storage medium containing executable code for instructing a controller to perform gain control in a transmitter of a wireless device, said transmitter including a combiner and a variable gain amplifier, said combiner receiving a digital input signal, and said variable gain amplifier receiving a pre-adjusted analog signal derived from said digital input signal, and said executable code instructing said controller to perform operations comprising:

receiving a gain control input signal that identifies a gain transition for a gain component to be applied to said pre-adjusted analog signal by said variable gain amplifier, said gain transition indicating an initial gain of said pre-adjusted analog signal and a final gain of said pre-adjusted analog signal;

generating a gain arc related to said gain transition, said gain arc exhibiting an arc duration, and a portion of said gain arc indicating a low instantaneous signal power at an antenna of said wireless device;

generating a gain ramp signal that includes a delay component and a gain component, said gain component indicating a sequence of gains for achieving said gain transition, said generating said gain ramp signal including establishing said delay component in response to said arc duration and establishing a transition time period for said gain component based on a time period for said portion of said gain arc that indicates said low instantaneous signal power;

incorporating said gain arc into a digital gain signal to form a composite digital gain signal having a digital gain change;

providing said composite digital gain signal to said combiner for combination with said digital input signal to generate a pre-compensated digital signal such that said digital gain change occurs when said portion of said gain arc indicates said low instantaneous signal power; and

providing said gain ramp signal to said variable gain amplifier for combination with said pre-adjusted analog signal to generate a gain-adjusted analog signal for transmission from said antenna, said providing operation occurring at an onset of said arc duration with an application of said delay component followed by said gain component such that application of said sequence of gains to said pre-adjusted analog signal occurs when said portion of said gain arc indicates said low instantaneous signal power.

18. A computer-readable storage medium as claimed in claim 17 wherein said executable code instructs said controller to define a transition time period for achieving said gain transition as being substantially equivalent to fifty percent of said arc duration.

19. A computer-readable storage medium as claimed in claim 17 wherein said variable gain amplifier is a stepped variable gain amplifier, said gains from said sequence of gains are applied as stepped gain transitions, and said executable code instructs said controller to determine a step duration of each of said gains in response to a time period for said portion of said gain arc that indicates said low instantaneous signal power level.

20. A computer-readable storage medium as claimed in claim 17 wherein said executable code instructs said controller to define said delay component as being substantially equivalent to twenty-five percent of said arc duration.

Assignments (21)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0807 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2015
From: ZENITH INVESTMENTS, LLC
To: APPLE INC.
Reel/Frame 034749/0791 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: ZENITH INVESTMENTS, LLC
Reel/Frame 033687/0336 →