Anodically bonded ultra-high-vacuum cell
The present invention discloses an anodically bonded vacuum cell structure with a glass substrate including a cavity, and a substrate deposited on the glass substrate, thereby enclosing the cavity to form a bonding interface. The bonding interface having silicon such that the substrate includes a layer of silicon or a secondary substrate with silicon layer bonded onto the secondary substrate.
1. A method for fabricating a vacuum glass cell using anodic bonding technique, in which a body of the cell is bonded onto a substrate at a cavity or opening of the cell, the method comprising the steps of:
positioning the substrate on a first electrode;
aligning the body of the cell on top of the substrate, thereby enclosing said cavity to form a bonding interface, said interface having silicon;
applying pressure to hold the cell on the substrate;
attaching a second electrode around the body of the cell;
heating said substrate and said cell body via said at least one of the first and second electrodes;
applying voltage between said first and second electrodes to initiate and complete formation of the bond between the cell and the substrate.
2. The method of claim 1 further comprising baking said bonded substrate and the cell.
3. The method of claim 1 further comprising applying a gas to said bonding interface, said gas comprising an inert gas, reducing gas, and combinations thereof.
4. The method of claim 1 wherein heating is performed in the range from about 200° C. to about 450° C. without a release of by-product or contamination.
5. The method of claim 1 wherein said voltage is applied in the range from about 200V to about 2KV.
6. The method of claim 1 further comprising enclosing said cell and the substrate with a gas, said gas comprising an inert gas, reducing gas, and combinations thereof.
7. The method of claim 1 wherein said cavity comprising an alkali metal.
8. The method of claim 1 wherein said substrate comprising an optical component.
9. The method of claim 1 wherein said substrate comprising a silicon layer and a secondary substrate.
10. The method of claim 9 wherein said secondary substrate comprising a cavity below the bonding interface.
11. The method of claim 9 further comprising placing said silicon layer on top of the secondary substrate to substantially cover the top surface of the secondary substrate.
12. The method of claim 9 further comprising placing said silicon layer only at a portion of the secondary substrate with the bonding interface.