Verification of array built-in self-test (ABIST) design-for-test/design-for-diagnostics (DFT/DFD)
View Patent ↗A method, system and computer program product for testing the Design-For-Testability/Design-For-Diagnostics (DFT/DFD) and supporting BIST functions of a custom microcode array. Upon completion of the LSSD Flush and Scan tests, the ABIST program is applied to target the logic associated direct current (DC) and alternating current (AC) faults of ABIST array Design-For-Testability/Design-For-Diagnostics DFT/DFD functions that support the microcode array. A LSSD test of the DFT functional combinational logic is performed by applying generated LSSD deterministic test patterns targeting the ABIST design-for-test faults to determine if the DFT supporting the microcode array is functioning correctly. Additional tests may be terminated upon resulting failure of the applied ABIST DFT circuitry surrounding the arrays.
1. A method for testing DFT/DFD structures surrounding a custom microcode array, comprising:
scanning an Array Built-In Self-Test (ABIST) test pattern into a microcode array test circuitry;
conducting conventional Level-Sensitive Scan Design (LSSD) Flush and Scan tests;
upon successful completion of the LSSD Flush and Scan tests, invoking a test generator performing the steps of:
generating LSSD deterministic test patterns, and
applying the LSSD deterministic test patterns at a Design-For-Testability/Design-For-Diagnostics (DFT/DFD) test circuit;
targeting logic associated with direct current (DC) and alternating current (AC) faults for array ABIST Design-For-Testability/Design-For-Diagnostics (DFT/DFD) functions surrounding the microcode array; and
terminating further array ABIST tests upon resulting failure of the conducted LSSD Flush and Scan tests.