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App. No. 12/292,802 · Confirmation No. 1535

Layout design method of semiconductor integrated circuit by using soft macro

Inventor: Tetsuo Andou
Abandoned -- Failure to Respond to an Office Action View Publication ↗
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 Code Description Pages PDF
2012-04-24 ABN Abandonment 2 View
2011-08-08 CTRS Requirement for Restriction/Election 6 View
2011-08-08 FWCLM Index of Claims 1 View
2009-06-04 NTC.PUB Notice of Publication 1 View
2009-02-11 PD.FILED.E Priority Documents electronically retrieved by USPTO from a participating IP Office 36 View
2009-02-09 TRAN.LET Transmittal Letter 2 View
2009-02-09 IDS Information Disclosure Statement (IDS) Form (SB08) 1 View
2009-02-09 FOR Foreign Reference 42 View
2009-01-21 APP.FILE.REC Filing Receipt 3 View
2008-11-26 TRNA Transmittal of New Application 3 View
2008-11-26 SPEC Specification 33 View
2008-11-26 CLM Claims 8 View
2008-11-26 ABST Abstract 1 View
2008-11-26 DRW Drawings-only black and white line drawings 19 View
2008-11-26 OATH Oath or Declaration filed 4 View
2008-11-26 ADS Application Data Sheet 2 View
2008-11-26 WFEE Fee Worksheet (SB06) 1 View
2008-11-26 WFEE Fee Worksheet (SB06) 1 View
2008-11-26 136A Authorization for Extension of Time all replies 3 View
2008-11-26 WFEE Fee Worksheet (SB06) 1 View
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Quick Facts
App. No.
12/292,802
Filed
2008-11-26
Pub. No.
US20090144687A1
Art Unit
2825