Method for packaging electronic devices and integrated circuits
View Patent ↗The present invention relates to the field of electronic devices and their associated driver and/or controller integrated circuits and in particular to the mechanical packaging of electronic devices and to the packaging of electronic devices and their associated driver and/or controller integrated circuits.
1. A method for packaging electronic components comprising:
a) providing at least one support substrate ( 1 ) comprising a layer of material selected from a group consisting of silicon, gallium arsenide, InP, SiGe, sapphire or a semiconductor having a an energy gap between 2.5 and 10.0 eV,
b) producing at least one recess ( 7 ) in a top side ( 1 a ) of said support substrate ( 1 ) comprising one stair ( 11 ) at one side of and within the recess using a subtractive process selected from the group consisting of etching, lapping and sandblasting,
c) placing at least one first electronic device ( 61 ) partially onto said stair ( 11 ) to space said first electronic device ( 61 ) from a bottom ( 71 ) of said recess ( 7 ); and
d) covering at least partially said top side ( 1 a ) of said support substrate ( 1 ) with a lid ( 4 ).
2. The method according to claim 1 , wherein the step of covering said top side ( 1 a ) of said support substrate ( 1 ) with a lid ( 4 ) comprises the step of forming a cavity by said recess ( 7 ) and said lid ( 4 ) housing said first electronic device ( 61 ).
3. The method according to claim 1 further comprising arranging at least one second electronic device ( 62 ) on said top side ( 1 a ) of said support substrate ( 1 ).
4. The method according to claim 1 , wherein said first electronic device ( 61 ) is mounted on said stair ( 11 ) such that said first electronic device ( 61 ) is at least partially movable.
5. An electronic package ( 20 ) comprising:
a) at least one support substrate ( 1 ) comprising a single layer of material selected from a group consisting of silicon, gallium arsenide, InP, SiGe, sapphire or a semiconductor having a an energy gap between 2.5 eV and 10.0 eV, the support having at least one recess formed in the layer ( 7 ) in a top side ( 1 a ) wherein said recess ( 7 ) comprises one stair ( 11 ) at one side of and within the recess,
b) at least one first electronic device ( 61 ) arranged partially onto said stair ( 11 ) spacing said first electronic device ( 61 ) from the bottom ( 71 ) of said recess ( 7 ), and
c) a lid ( 4 ) covering at least partially said top side ( 1 a ) of said support substrate ( 1 ).
6. The electronic package ( 20 ) according to claim 5 comprises a cavity which houses said first electronic device ( 61 ) and which is formed by covering said recess ( 7 ) with said lid ( 4 ).
7. The electronic package ( 20 ) according to claim 5 , wherein said first electronic device ( 61 ) is mounted on said stair ( 11 ) such that said first electronic device ( 61 ) is movably mounted.
8. The electronic package ( 20 ) according to claim 5 , wherein said first electronic device ( 61 ) comprises a MEMS device, a semiconductor function element, an optical function element, a thermo function element and/or a mechanical function element.