IP Library Granted Patent US 8,530,754
Granted Patent B2
US 8,530,754 · App. 12/329,769 · Granted Sep 10, 2013

Printed circuit board having adaptable wiring lines and method for manufacturing the same

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Quick Facts
Patent No.
US 8,530,754
App. No.
12/329,769
Granted
Sep 10, 2013
Kind
B2
Abstract

A printed circuit board having adaptable wiring lines includes an insulation layer. Electrode terminals and ball lands are formed on an upper surface of the insulation layer and are separated from each other. Wiring patterns are formed on the insulation layer, interposed between the electrode terminals and the ball lands, and partially removed in a region between the electrode terminals and the ball lands. Conductive members are selectively formed in the regions where the wiring patterns are partially removed to selectively connect the electrode terminals and the ball lands.

Claims (34)

1. A printed circuit board comprising:

an insulation layer,

electrode terminals formed on an upper surface of the insulation layer,

ball lands formed on the upper surface of the insulation layer and separated from the electrode terminals;

wiring patterns formed on the upper surface of the insulation layer, interposed between the electrode terminals and the ball lands, and partially removed in predetermined regions; and

anisotropic conductive members formed in the predetermined regions where the wiring patterns are partially removed,

wherein some of the anisotropic conductive members are pressed if electrical connection between the electrode terminals and the ball lands is required, and the other anisotropic conductive members are not pressed if electrical connection between the electrode terminals and the ball lands is not required.

2. The printed circuit board according to claim 1 , wherein the anisotropic conductive members comprise any one of an anisotropic conductive film (ACF) and an anisotropic conductive ink (ACI).

3. The printed circuit board according to claim 1 , further comprising:

a solder resist applied over the insulation layer.

4. The printed circuit board according to claim 3 , wherein the solder resist applied over the insulation layer exposes only the anisotropic conductive members.

5. The printed circuit board according to claim 3 , wherein the solder resist applied over the insulation layer covers the anisotropic conductive members.

6. A printed circuit board comprising:

an insulation layer;

electrode terminals formed on an upper surface of the insulation layer;

ball lands formed on the upper surface of the insulation layer and separated from the electrode terminals; and

wiring patterns formed on the upper surface of the insulation layer and interposed between the electrode terminals and the ball lands, the wiring patterns comprising:

connection wiring lines which are partially removed in predetermined regions between the electrode terminals and the ball lands; and

anisotropic conductive members which are formed in the predetermined regions where the connection wiring lines are partially removed,

wherein some of the anisotropic conductive members are pressed if electrical connection between the electrode terminals and the ball lands is required, and the other anisotropic conductive members are not pressed if electrical connection between the electrode terminals and the ball lands is not required.

7. The printed circuit board according to claim 6 , wherein the anisotropic conductive members comprise any one of an anisotropic conductive film (ACF) and an anisotropic conductive ink (ACI).

8. The printed circuit board according to claim 6 , further comprising:

a solder resist applied over the insulation layer.

9. The printed circuit board according to claim 8 , wherein the solder resist applied over the insulation layer exposes only the anisotropic conductive members.

10. The printed circuit board according to claim 8 , wherein the solder resist applied over the insulation layer covers the anisotropic conductive members.

11. A method for manufacturing a printed circuit board, comprising the steps of:

forming an insulation layer having electrode terminals and ball lands separated from the electrode terminals on an upper surface thereof;

forming wiring patterns on the upper surface of the insulation layer to be interposed between the electrode terminals and the ball lands and to be composed of connection wiring lines which are partially removed in predetermined regions between the electrode terminals and the ball lands and anisotropic conductive members which are formed in the predetermined regions where the connection wiring lines are partially removed,

pressing selectively the anisotropic conductive members, by pressing the anisotropic conductive members if the electrical connection between the electrode terminals the ball lands is required, and not pressing the anisotropic conductive members if electrical connection between the electrode terminals and the ball lands is not required.

12. The method according to claim 11 , wherein the anisotropic conductive members are formed using any one of an anisotropic conductive film (ACF) and an anisotropic conductive ink (ACI).

13. The method according to claim 11 , wherein, after the step of forming the wiring patterns, the method further comprises the step of:

applying a solder resist over the insulation layer including the anisotropic conductive members.

14. The method according to claim 13 , wherein, in the step of applying the solder resist, the solder resist is formed to expose only the anisotropic conductive members.

15. The method according to claim 13 , wherein, in the step of applying the solder resist, the solder resist is formed to cover the anisotropic conductive members.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2008
From: PARK, SHIN YOUNG
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 021937/0300 →