Controlling temperature in a semiconductor device
View Patent ↗Systems and methods for reducing temperature dissipation during burn-in testing are described. Devices under test are each subject to a body bias voltage. The body bias voltage can be used to control junction temperature (e.g., temperature measured at the device under test). The body bias voltage applied to each device under test can be adjusted device-by-device to achieve essentially the same junction temperature at each device.
1. A semiconductor device comprising:
a gate, a drain, and a source, each formed within a substrate;
a terminal formed within said substrate and operable for receiving a body bias voltage; and
a temperature monitor operable for measuring a temperature of said semiconductor device, wherein a value for said temperature is adjusted by adjusting said body bias voltage.
2. The semiconductor device of claim 1 , wherein said body bias voltage is selected to achieve a particular temperature measured at said semiconductor device.
3. The semiconductor device of claim 1 , wherein said semiconductor device comprises a positive-channel metal-oxide semiconductor (PMOS) device.
4. The semiconductor device of claim 3 , wherein said body bias voltage is in a range of approximately zero to five volts.
5. The semiconductor device of claim 1 , wherein said semiconductor device comprises a negative-channel metal-oxide semiconductor (NMOS) device.
6. The semiconductor device of claim 5 , wherein said body bias voltage is in a range of approximately zero to minus ten volts.
7. The semiconductor device of claim 1 , wherein said temperature is measured at an interface between a heat sink and a die of said semiconductor device.
8. A semiconductor device comprising:
a gate formed in a substrate;
a drain formed in said substrate;
a source formed in said substrate; and
a terminal formed in said substrate and coupled to a well comprising said source, wherein said terminal operable is for receiving a body bias voltage, wherein a temperature on said semiconductor device is monitored and wherein an amount of said body bias voltage is selected to achieve a particular value for said temperature.
9. The semiconductor device of claim 8 , wherein said semiconductor device comprises a positive-channel metal-oxide semiconductor (PMOS) device.
10. The semiconductor device of claim 9 , wherein said amount of body bias voltage is in a range of approximately zero to five volts.
11. The semiconductor device of claim 8 , wherein said semiconductor device comprises a negative-channel metal-oxide semiconductor (NMOS) device.
12. The semiconductor device of claim 11 , wherein said amount of body bias voltage is in a range of approximately zero to minus ten volts.
13. A method comprising:
applying an operating voltage to a semiconductor device comprising a well that includes a source region; and
applying an amount of body bias voltage to said well, wherein said amount of body bias voltage is selected to achieve a particular value for a temperature measured at said semiconductor device.
14. The method of claim 13 , further comprising adjusting said amount of body bias voltage to adjust a value of said temperature measured at said semiconductor device.
15. The method of claim 13 , wherein said semiconductor device comprises a positive-channel metal-oxide semiconductor (PMOS) device and said well comprises an N-well.
16. The method of claim 15 , wherein said amount of body bias voltage is in a range of approximately zero to five volts.
17. The method of claim 13 , wherein said semiconductor device comprises a negative-channel metal-oxide semiconductor (NMOS) device and said well comprises a P-well.
18. The method of claim 17 , wherein said amount of body bias voltage is in a range of approximately zero to minus ten volts.