Semiconductor device and method of placing semiconductor die on a temporary carrier using fiducial patterns
A semiconductor device has an adhesive layer depositing over a temporary carrier. A plurality of fiduciary patterns is formed over the adhesive layer. A repassivation layer is formed over semiconductor die. The repassivation layer may be a plurality of discrete regions. Alignment slots are formed in the repassivation layer. The fiducial patterns and alignment slots have slanted sidewalls. Leading with the repassivation layer, the semiconductor die is placed onto the carrier so that the alignment slots envelope and lock to the fiducial patterns. Alternatively, a die without the repassivation layer is placed between the fiducial patterns. An encapsulant is deposited over the semiconductor die while the die remain locked to the fiducial patterns. The carrier, adhesive layer, and fiducial patterns are removed after depositing the encapsulant. An interconnect structure is formed over the repassivation layer to electrically connect to contact pads on the semiconductor die.
1. A method of making a semiconductor device, comprising:
providing a carrier;
depositing an adhesive layer over the carrier;
forming a plurality of fiduciary patterns over the adhesive layer;
forming a repassivation layer over semiconductor die;
forming alignment slots in the repassivation layer;
leading with the repassivation layer, placing the semiconductor die onto the carrier so that the alignment slots envelope and lock to the fiducial patterns;
depositing an encapsulant over the semiconductor die while the alignment slots remain locked to the fiducial patterns;
removing the carrier, adhesive layer, and fiducial patterns after depositing the encapsulant; and
forming an interconnect structure over the repassivation layer, the interconnect structure being electrically connected to contact pads on an active surface of the semiconductor die.
2. The method of claim 1 , wherein the first layer is repassivation, photoresist, polymer dielectric, organic dielectric, or other photo-imageable material.
3. The method of claim 1 , wherein forming the interconnect structure includes:
forming a conductive layer over the repassivation layer and into the alignment slots to electrically connect to the contact pads of the semiconductor die;
forming an insulating layer over the conductive layer and repassivation layer; and
forming a solder bump over the conductive layer.
4. The method of claim 1 , further including removing the repassivation layer and alignment slots after depositing the encapsulant.
5. The method of claim 4 , wherein forming the interconnect structure includes:
forming a first insulating layer over the active surface of the semiconductor die;
removing a portion of the first insulating layer over the contact pads of the semiconductor die;
forming a conductive layer over the first insulating layer to electrically connect to the contact pads of the semiconductor die;
forming a second insulating layer over the conductive layer and first insulating layer; and
forming a solder bump over the conductive layer.
6. The method of claim 1 , wherein the fiduciary patterns match repassivation patterns, and have lower height than repassivation layer.
7. A method of making a semiconductor device, comprising:
providing a carrier;
depositing an adhesive layer over the carrier;
forming a plurality of fiduciary patterns over the adhesive layer;
forming a first layer over semiconductor die;
forming alignment slots in the first layer;
placing the semiconductor die onto the carrier so that the alignment slots envelope and lock to the fiducial patterns;
depositing an encapsulant over the semiconductor die while the alignment slots remain locked to the fiducial patterns;
removing the carrier, adhesive layer, and fiducial patterns after depositing the encapsulant; and
forming an interconnect structure over the first layer, the interconnect structure being electrically connected to contact pads on an active surface of the semiconductor die.
8. The method of claim 7 , wherein the first layer is repassivation, photoresist, polymer dielectric, organic dielectric, or other photo-imageable material.
9. The method of claim 7 , wherein forming the interconnect structure includes:
forming a conductive layer over the first layer and into the alignment slots to electrically connect to the contact pads of the semiconductor die;
forming an insulating layer over the conductive layer and first layer; and
forming a solder bump over the conductive layer.
10. The method of claim 7 , wherein the first layer includes a plurality of discrete regions.
11. The method of claim 7 , wherein the alignment slots have slanted sidewalls.
12. The method of claim 7 , further including:
attaching a bond head to a surface of the semiconductor die opposite an active surface of the semiconductor die; and
moving the bond head in the x, y, and z direction to place the semiconductor die onto the carrier.
13. A method of making a semiconductor device, comprising:
providing a carrier;
forming a plurality of fiduciary patterns over the carrier;
forming a first layer over semiconductor die;
forming alignment slots in the first layer;
placing the semiconductor die onto the carrier so that the alignment slots envelope and lock to the fiducial patterns;
depositing an encapsulant over the semiconductor die while the alignment slots remain locked to the fiducial patterns;
removing the carrier, adhesive layer, and fiducial patterns after depositing the encapsulant; and
forming an interconnect structure over the first layer, the interconnect structure being electrically connected to contact pads on an active surface of the semiconductor die.
14. The method of claim 13 , wherein the first layer is repassivation, photoresist, polymer dielectric, organic dielectric, or other photo-imageable material.
15. The method of claim 13 , wherein forming the interconnect structure includes:
forming a conductive layer over the first layer and into the alignment slots to electrically connect to the contact pads of the semiconductor die;
forming an insulating layer over the conductive layer and first layer; and
forming a solder bump over the conductive layer.
16. The method of claim 13 , wherein the first layer includes a plurality of discrete regions.
17. The method of claim 13 , wherein the alignment slots have slanted sidewalls.
18. A method of making a semiconductor device, comprising:
providing a carrier;
forming a plurality of fiduciary patterns over the carrier;
placing the semiconductor die onto the carrier so that the semiconductor die locks to the fiducial patterns;
depositing an encapsulant over the semiconductor die while the semiconductor die remains locked to the fiducial patterns;
removing the carrier, adhesive layer, and fiducial patterns after depositing the encapsulant; and
forming an interconnect structure over the semiconductor die, the interconnect structure being electrically connected to contact pads on an active surface of the semiconductor die.
19. The method of claim 18 , wherein the fiducial patterns are formed outside and around a portion of a footprint of the semiconductor die.
20. The method of claim 18 , wherein the carrier is transparent.
21. The method of claim 18 , further including:
providing a camera to generate images of the semiconductor die; and
utilizing the images of the semiconductor die to control movement of the bond head.
22. The method of claim 18 , wherein the fiducial patterns have slanted sidewalls.