IP Library Granted Patent US 7,645,691
Granted Patent B2
US 7,645,691 · App. 12/333,207 · Granted Jan 12, 2010

Method for forming zener zap diodes and ohmic contacts in the same integrated circuit

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Quick Facts
Patent No.
US 7,645,691
App. No.
12/333,207
Granted
Jan 12, 2010
Kind
B2
Abstract

A method for forming an ohmic contact and a zener zap diode in an integrated circuit includes forming a first contact opening in the insulating layer over a first diffusion region to expose the semiconductor substrate; forming a barrier metal layer on the insulating layer and in the first contact opening; forming a second contact opening in the barrier metal layer over a second diffusion region and the insulating layer to expose the semiconductor substrate; forming a third contact opening in the barrier metal layer and the insulating layer over a third diffusion region to expose the semiconductor substrate; forming an aluminum layer on the barrier metal layer and the insulating layer and in the first, second and third contact openings; and patterning the aluminum layer to form the ohmic contact over the first diffusion region and the zener zap diode over the second and third diffusion regions.

Claims (16)

1. A method for forming an ohmic contact and a zener zap diode in an integrated circuit, comprising:

providing a semiconductor substrate;

forming first, second and third diffusion regions in the semiconductor substrate, the second and third diffusion regions being of opposite polarity types;

forming an insulating layer on the semiconductor substrate;

forming a first contact opening in the insulating layer to expose the semiconductor substrate, the first contact opening being formed over the first diffusion region;

forming a barrier metal layer on the insulating layer and in the first contact opening;

forming a second contact opening in the barrier metal layer and the insulating layer to expose the semiconductor substrate, the second contact opening being formed over the second diffusion region;

forming a third contact opening in the barrier metal layer and the insulating layer to expose the semiconductor substrate, the third contact opening being formed over the third diffusion region;

forming an aluminum layer on the barrier metal layer and the insulating layer and in the first, second and third contact openings; and

patterning the aluminum layer to form the ohmic contact over the first diffusion region and the zener zap diode over the second and third diffusion regions.

2. The method of claim 1 , further comprising:

a first well in which the first diffusion region is formed, the first well having the same polarity type as the first diffusion region; and

a fourth diffusion region formed in the first well and having an opposite polarity type as the first well, the second and third diffusion regions being formed in the fourth diffusion regions, the fourth diffusion region being more lightly doped than the second or third diffusion region.

3. The method of claim 1 , wherein the barrier metal layer comprises a titanium (Ti) layer and a titanium nitride (TiN) layer formed on the titanium layer.

4. The method of claim 1 , wherein the ohmic contact comprises a metal plug contact formed using a metal other than aluminum.

5. The method of claim 4 , wherein the metal plug contact is formed using tungsten or copper.

Assignments (9)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →