Dual insulating layer diode with asymmetric interface state and method of fabrication
View Patent ↗An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. The diode is a metal-insulator diode having a first metal layer, a first insulating layer, a second insulating layer and a second metal layer. At least one asymmetric interface state is provided at the intersection of at least two of the layers to increase the ratio of the diode's on-current to its reverse bias leakage current. In various examples, the asymmetric interface state is formed by a positive or negative sheet charge that alters the barrier height and/or electric field at one or more portions of the diode. Two-terminal devices such as passive element memory cells can utilize the diode as a steering element in series with a state change element. The devices can be formed using pillar structures at the intersections of upper and lower conductors.
1. A metal-insulator diode, comprising:
a first metal layer;
a second metal layer separated from the first metal layer;
a first insulating layer between the first metal layer and the second metal layer, the first insulating layer adjacent to the first metal layer;
a second insulating layer between the first metal layer and the second metal layer, the second insulating layer adjacent to the first insulating layer and the second metal layer, the second insulating layer having an interface with the second metal layer; and
a positive fixed charge at the interface of the second insulating layer and the second metal layer.
2. A diode according to claim 1 , wherein:
the first insulating layer has a first bandgap;
the second insulating layer has a second bandgap, the second bandgap is smaller than the first bandgap.
3. A diode according to claim 2 , wherein:
the interface is a first interface; and
the first insulating layer has a second interface with the first metal layer; and
the diode further includes a negative fixed charge at the second interface.
4. A diode according to claim 2 , wherein:
the first metal has a first work function; and
the second metal has a second work function, the second work function being larger than the first work function.
5. A diode according to claim 4 , wherein:
the first insulating layer has a first thickness; and
the second insulating layer has a second thickness, the second thickness being greater than the first thickness.
6. A diode according to claim 2 , wherein:
the first insulating layer has a first dielectric constant; and
the second insulating layer has a second dielectric constant, the second dielectric constant being higher than the first dielectric constant.
7. A diode according to claim 6 , wherein:
the first insulating layer is SiO2; and
the second insulating layer is HfO2.
8. A metal-insulator diode, comprising:
a first metal layer;
a second metal layer separated from the first metal layer;
a first insulating layer between the first metal layer and the second metal layer, the first insulating layer adjacent to the first metal layer; and
a second insulating layer between the first metal layer and the second metal layer, the second insulating layer adjacent to the first insulating layer and the second metal layer, the second insulating layer having an interface with the second metal layer; and
a negative fixed charge at the interface of the second insulating layer and the second metal layer.
9. A diode according to claim 8 , wherein:
the first insulating layer has a first bandgap; and
the second insulating layer has a second bandgap, the second bandgap is larger than the first bandgap.
10. A diode according to claim 8 , wherein:
the first metal has a first work function; and
the second metal has a second work function, the second work function being smaller than the first work function.
11. A diode according to claim 10 , wherein:
the first insulating layer has a first thickness; and
the second insulating layer has a second thickness, the second thickness being less than the first thickness.
12. A diode according to claim 1 , wherein the diode is part of a three-dimensional monolithic non-volatile memory system, the memory system comprising:
a first plurality of conductors elongated in a first direction at a first height above a substrate;
a second plurality of conductors elongated in a second direction at a second height above the first plurality of conductors; and
a plurality of non-volatile storage elements formed between the first plurality of conductors and the second plurality of conductors, the plurality of non-volatile storage elements each including a steering element in series with a state change element.
13. A diode according to claim 12 , wherein the state change element of each non-volatile storage element is a field-programmable re-writable state change element.
14. A diode according to claim 12 , wherein the state change element of each non-volatile storage element is a one-time field-programmable state change element.
15. A diode according to claim 12 , wherein:
the plurality of non-volatile storage elements is formed at a first memory level of the monolithic non-volatile memory system; and
the monolithic non-volatile memory system includes a plurality of additional memory levels.
16. A metal-insulator diode, comprising:
a first metal layer;
a second metal layer separated from the first metal layer;
a first insulating layer between the first metal layer and the second metal layer, the first insulating layer adjacent to the first metal layer;
a second insulating layer between the first metal layer and the second metal layer, the second insulating layer adjacent to the first insulating layer and the second metal layer, the second insulating layer having an interface with the first insulating layer; and
a negative fixed charge at the interface of the second insulating layer and the first insulating layer.
17. A diode according to claim 16 , wherein:
the first insulating layer has a first thickness and a first bandgap; and
the second insulating layer has a second thickness and a second bandgap, the first thickness being substantially equal to the second thickness, the first bandgap being lower than the second bandgap.
18. A diode according to claim 16 , wherein:
the first insulating layer has a first thickness and a first bandgap; and
the second insulating layer has a second thickness and a second bandgap, the first thickness being less than the second thickness, the first bandgap being lower than the second bandgap.
19. A metal-insulator diode, comprising:
a first metal layer;
a second metal layer separated from the first metal layer;
a first insulating layer between the first metal layer and the second metal layer, the first insulating layer adjacent to the first metal layer;
a second insulating layer between the first metal layer and the second metal layer, the second insulating layer adjacent to the first insulating layer and the second metal layer, the second insulating layer having an interface with the first insulating layer; and
a positive fixed charge at the interface of the second insulating layer and the first insulating layer.
20. A method of fabricating a metal-insulator diode, the method comprising:
forming a first metal layer over a substrate;
forming a first insulating layer adjacent to the first metal layer, the first insulating layer having an interface with the first metal layer;
forming a second insulating layer adjacent to the first insulating layer;
forming a second metal layer adjacent to the second insulating layer; and
forming a positive fixed charge at the interface of the first metal layer and the first insulating layer.
21. A method according to claim 20 , wherein:
the first insulating layer includes a lower bandgap than the second insulating layer.
22. A method according to claim 21 , wherein:
the interface of the first metal layer and the first insulating layer is a first interface;
the method further comprising forming a negative fixed charge at a second interface of the second metal layer and the second insulating layer.
23. A method according to claim 21 , wherein forming the positive fixed charge includes:
passivating at least one of the first metal layer and the first insulating layer to form the positive fixed charge at the interface of the first metal layer and the first insulating layer.
24. A method according to claim 21 , wherein forming the positive fixed charge includes:
doping the first insulating layer to implant the positive fixed charge at the interface of the first metal layer and the first insulating layer.
25. A method of fabricating a metal-insulator diode, comprising:
forming a first metal layer over a substrate;
forming a first insulating layer adjacent to the first metal layer, the first insulating layer having an interface with the first metal layer;
forming a second insulating layer adjacent to the first insulating layer;
forming a second metal layer adjacent to the second insulating layer; and
forming a negative fixed charge at the interface of the first metal layer and the first insulating layer.
26. A method according to claim 25 , wherein:
the first insulating layer includes a higher bandgap than the second insulating layer.
27. A method according to claim 20 , wherein:
forming the second metal layer is performed prior to forming the second insulating layer, the first insulating layer and the first metal layer;
forming the second insulating layer includes forming the second insulating layer over the second metal layer;
forming the first insulating layer includes forming the first insulating layer over the second insulating layer; and
forming the first metal layer includes forming the first metal layer over the first insulating layer.
28. A method of fabricating a metal-insulator diode, the method comprising:
forming a first metal layer over a substrate;
forming a first insulating layer adjacent to the first metal layer;
forming a second insulating layer adjacent to the first insulating layer, the second insulating layer having an interface with the first insulating layer;
forming a second metal layer adjacent to the second insulating layer; and
forming a negative fixed charge at the interface of the first insulating layer and the second insulating layer.
29. A method according to claim 28 , wherein forming the negative fixed charge includes:
passivating at least one of the first insulating layer and the second insulating layer to form the negative fixed charge at the interface of the first insulating layer and the second insulating layer.
30. A method according to claim 28 , wherein forming the negative fixed charge includes:
doping at least one of the first insulating layer and the second insulating layer to form the negative fixed charge at the interface of the first insulating layer and the second insulating layer.
31. A method according to claim 28 , wherein:
a thickness of the first insulating layer and a thickness of the second insulating layer are substantially equal.
32. A method according to claim 28 , wherein:
the first insulating layer has a first bandgap and a first thickness; and
the second insulating layer has a second bandgap and a second thickness, the second bandgap being larger than the first bandgap, the second thickness being greater than the first thickness.
33. A method of fabricating a metal-insulator diode, the method comprising:
forming a first metal layer over a substrate;
forming a first insulating layer adjacent to the first metal layer;
forming a second insulating layer adjacent to the first insulating layer, the second insulating layer having an interface with the first insulating layer;
forming a second metal layer adjacent to the second insulating layer; and
forming a positive fixed charge at the interface of the first insulating layer and the second insulating layer.
34. A method according to claim 33 , wherein:
the first insulating layer has a first bandgap and a first thickness; and
the second insulating layer has a second bandgap and a second thickness, the second bandgap being larger than the first bandgap, the second thickness being less than the first thickness.
35. A method according to claim 1 , wherein the positive fixed charge is in the second metal layer.
36. A method according to claim 1 , wherein the positive fixed charge is in the second insulating layer.
37. A method according to claim 1 , wherein the positive fixed charge is in the second metal layer and the second insulating layer.
38. A method according to claim 16 , wherein the negative fixed charge is in the first insulating layer.
39. A method according to claim 19 , wherein:
the first insulating layer has a first thickness and a first bandgap; and
the second insulating layer has a second thickness and a second bandgap, the first thickness being greater than the second thickness, the first bandgap being lower than the second bandgap.