IP Library Granted Patent US 7,701,726
Granted Patent B2
US 7,701,726 · App. 12/340,267 · Granted Apr 20, 2010

Method of manufacturing a wiring substrate and semiconductor device

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Quick Facts
Patent No.
US 7,701,726
App. No.
12/340,267
Granted
Apr 20, 2010
Kind
B2
Abstract

A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed.

Claims (23)

1. A method of manufacturing a semiconductor device, comprising the steps of:

preparing a wiring substrate comprising:

a base insulating film;

a first interconnection formed on a top surface side of the base insulating film;

a via conductor provided in a via hole formed in the base insulating film; and

a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor,

wherein the wiring substrate comprises a plurality of divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed;

the wiring substrate further comprises a warpage-controlling pattern on the base insulating film; and

the wiring substrate has a warped shape such that when the wiring substrate is left at rest on a horizontal plate, at least a central part of a plane surface of the substrate contacts the horizontal plate, with both ends of sides of the plane surface being raised, wherein each of the sides extends along a second direction perpendicular to a first direction in the plane surface of the substrate;

placing the wiring substrate on a stage so that a first direction of the wiring substrate extends along a transfer direction and so that a top surface side of the wiring substrate with a first interconnection formed thereon faces upward;

mounting a semiconductor chip on the top surface side of the wiring substrate; and

transferring the wiring substrate with the semiconductor chip mounted thereon, in the first direction.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the stage includes a retainer that holds both sides of the wiring substrate placed on the stage where the both sides extend along the first direction, and the method further comprises the step of holding both sides of the wiring substrate placed on the stage using the retainer where the both sides extend along the first direction.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein the stage includes sucking means for fixedly sucking the wiring substrate placed on the stage, and the method further comprises the step of fixing the wiring substrate placed on the stage by sucking.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein the first interconnection is provided in a sunken section formed on a top surface side of the base insulating film;

the warpage-controlling pattern is provided in another sunken section formed on the top surface side of the base insulating film; and

the wiring substrate has a warped shape such that when the wiring substrate is left at rest on a horizontal plate with the first interconnection forming surface side facing upward, at least a central part of the plane surface of the substrate contacts the horizontal plate, with both ends of sides of the plane surface being raised, wherein each of the sides extends along the second direction.

5. The method of manufacturing a semiconductor device according to claim 4 , wherein the warpage-controlling pattern comprises a linear pattern that allows the wiring substrate to be warped so that both ends of each side of a plane surface of the wiring substrate lie above a middle part of each of the sides extending along the second direction.

6. The method of manufacturing a semiconductor device according to claim 4 , wherein for the warpage-controlling pattern and the first interconnection, a component ratio X/Y of a total component of X-components extending along the first direction to a total component of Y-components extending along the second direction is greater than 1.

7. The method of manufacturing a semiconductor device according to claim 4 , wherein at least a middle part of each of the sides extending along the second direction contacts the horizontal plate, and both the sides extending along the first direction are raised.

8. The method of manufacturing a semiconductor device according to claim 7 , wherein each of the sides extending along the second direction is shorter than every side extending along the first direction.

9. The method of manufacturing a semiconductor device according to claim 1 , wherein at least a middle part of each of the sides extending along the second direction contacts the horizontal plate, and both the sides extending along the first direction are raised.

10. The method of manufacturing a semiconductor device according to claim 1 , wherein each of the sides extending along the second direction is shorter than every side extending along the first direction.

Assignments (2)
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2008
From: TSUKANO, JUN; OGAWA, KENTA; MAEDA, TAKEHIKO
To: NEC ELECTRONICS CORPORATION; NEC CORPORATION
Reel/Frame 022018/0912 →