IP Library Granted Patent US 7,969,177
Granted Patent B2
US 7,969,177 · App. 12/341,162 · Granted Jun 28, 2011

System and method for thermal limit control

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Quick Facts
Patent No.
US 7,969,177
App. No.
12/341,162
Granted
Jun 28, 2011
Kind
B2
Abstract

This disclosure relates to a system and method for pulse generation. A system in accordance with the present disclosure may include a power dissipating element configured to receive power from a power source. At least one of the power source and the power dissipating element may be configured to generate a first signal. The system may further include a measuring instrument in communication with the power source. The measuring instrument may be configured to measure the first signal and to provide an input corresponding to a measured signal to a duty cycle limiter. The system may also include a pulse controller operatively connected to the power source. The pulse controller may be configured to control a duty cycle of the first signal and to receive a second signal from the duty cycle limiter. The pulse controller may be configured to disable at least one of the power source and the power dissipating element if the duty cycle limiter has determined that a maximum condition has been exceeded. Other embodiments are also within the scope of the present disclosure.

Claims (28)

1. A testing system comprising:

a voltage/current (VI) instrument including a power amplifier configured to generate a first signal of at least one of a voltage and a current, said VI instrument further configured to transmit said first signal to a device-under-test (DUT) and to perform a real-time measurement of said first signal to determine an ON-time and an OFF-time of said first signal, said VI instrument further configured to disable said power amplifier if a maximum allowable ON-time of said power amplifier is exceeded.

2. The testing system of claim 1 wherein said ON-time and OFF-time is measured by a counter, said counter configured to increment during said ON-time and decrement during said OFF-time.

3. The testing system of claim 1 wherein said VI instrument is further configured to disable said power amplifier if a maximum allowable ON-time to OFF-time duty cycle of said power amplifier is exceeded.

4. The testing system of claim 1 wherein at least one of said maximum allowable ON-time and a maximum allowable ON-time to OFF-time duty cycle of said power amplifier is adjusted in real-time.

5. The testing system of claim 1 wherein said VI instrument is further configured to provide an indication of an available ON-time before said maximum allowable ON-time is reached.

6. The testing system of claim 1 wherein said VI instrument is further configured to change said maximum allowable ON-time and a maximum allowable ON-time to OFF time duty cycle in response to at least one of a measured voltage and a measured current.

7. The testing system of claim 1 wherein said VI instrument is further configured to allow said power amplifier to be re-enabled from a disabled state and to apply at least one of said maximum allowable ON-time and a maximum allowable ON-time to OFF-time duty cycle.

8. A method for analyzing a voltage/current (VI) instrument comprising:

generating a first signal of at least one of a voltage and a current;

transmitting said first signal to a device-under-test (DUT);

performing a real-time measurement of said first signal to determine an ON-time and an OFF-time of said first signal; and

disabling said power amplifier if a maximum allowable ON-time of said power amplifier is exceeded.

9. The method of claim 8 further comprising measuring said ON-time and OFF-time by a counter, said counter configured to increment during said ON-time and decrement during said OFF-time.

10. The method of claim 8 further comprising disabling said power amplifier if a maximum allowable ON-time to OFF-time duty cycle of said power amplifier is exceeded.

11. The method of claim 8 further comprising adjusting, in real-time, at least one of said maximum allowable ON-time and a maximum allowable ON-time to OFF-time duty cycle of said power amplifier.

12. The method of claim 8 further comprising providing an indication of an available ON-time before said maximum allowable ON-time is reached.

13. The method of claim 8 further comprising changing said maximum allowable ON-time and a maximum allowable ON-time to OFF time duty cycle in response to at least one of a measured voltage and a measured current.

14. The method of claim 8 further comprising allowing said power amplifier to be re-enabled from a disabled state and to apply at least one of said maximum allowable ON-time and a maximum allowable ON-time to OFF-time duty cycle.

15. A pulsing system comprising:

a power dissipating element configured to receive power from a power source, at least one of said power source and said power dissipating element configured to generate a first signal;

at least one measuring instrument in communication with said at least one power source, said at least one measuring instrument configured to measure said first signal and to provide an input corresponding to a measured signal to a duty cycle limiter; and

a pulse controller operatively connected to said at least one power source, said pulse controller configured to control a duty cycle of said first signal, said pulse controller further configured to receive a second signal from said duty cycle limiter and to disable at least one of said power source and said power dissipating element if said duty cycle limiter has determined that a maximum condition has been exceeded.

16. The pulsing system of claim 15 wherein said pulse controller generates a variable pulsing operation.

17. The pulsing system of claim 16 wherein said pulsing system is associated with a device selected from the group consisting of a power tool and a power semiconductor device tester.

18. The pulsing system of claim 15 wherein said pulse controller generates a fixed pulsing operation.

19. The pulsing system of claim 18 wherein said pulsing system is associated with a fault protection function.

20. The pulsing system of claim 15 wherein said maximum condition is at least one of a maximum allowable ON-time and a maximum allowable duty cycle.

Assignments (10)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 047185, FRAME 0624 Recorded Mar 7, 2024
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS AGENT
To: XCERRA CORPORATION
Reel/Frame 066762/0811 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT STATEMENT THAT THIS DOCUMENT SERVES AS AN OATH/DECLARATION PREVIOUSLY RECORDED ON REEL 047185 FRAME 0628. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Nov 28, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047675/0354 →
PATENT SECURITY AGREEMENT Recorded Oct 2, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047185/0624 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 7261561 AND REPLACE WITH PATENT NUMBER 7231561 PREVIOUSLY RECORDED ON REEL 034660 FRAME 0188. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Feb 11, 2016
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 037824/0372 →
RELEASE OF SECURITY INTEREST IN UNITED STATES PATENTS Recorded Dec 18, 2014
From: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
To: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
Reel/Frame 034660/0394 →
SECURITY AGREEMENT Recorded Dec 18, 2014
From: XCERRA CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 034660/0188 →
CHANGE OF NAME Recorded May 27, 2014
From: LTX-CREDENCE CORPORATION
To: XCERRA CORPORATION
Reel/Frame 033032/0768 →
SECURITY AGREEMENT Recorded Jan 17, 2014
From: LTX-CREDENCE CORPORATION; EVERETT CHARLES TECHNOLOGIES LLC
To: SILICON VALLEY BANK, AS ADMINISTRATIVE AGENT
Reel/Frame 032086/0476 →
MERGER Recorded Mar 3, 2011
From: CREDENCE SYSTEMS CORPORATION
To: LTX-CREDENCE CORPORATION
Reel/Frame 025894/0629 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2009
From: PERKINS, PHILIP EARLE; LIMOGES, STEPHEN FREDERICK, JR.; YAN, XIAOMIN; MCGINLEY, JAMES WILLIAM; THERRIEN, ROGER HENRY
To: LTX CORPORATION
Reel/Frame 023218/0423 →