IP Library Granted Patent US 7,923,343
Granted Patent B2
US 7,923,343 · App. 12/343,851 · Granted Apr 12, 2011

Capacitor of semiconductor device and method for forming the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,923,343
App. No.
12/343,851
Granted
Apr 12, 2011
Kind
B2
Abstract

A method for forming a capacitor of a semiconductor device includes forming a cylindrical storage node over a semiconductor substrate; depositing a first dielectric layer over the cylindrical storage node; and etching the first dielectric layer to reduce a thickness of a portion of the first dielectric layer on a protruded end of the cylindrical storage node. The method further includes depositing a second dielectric layer over the etched first dielectric layer, wherein the second dielectric layer supplements a thickness of a portion of the first dielectric layer on a bottom corner of the cylindrical storage node. Finally, a cell plate is formed over the second dielectric layer.

Claims (46)

1. A method for forming a capacitor of a semiconductor device, the method comprising:

forming a cylindrical storage node over a semiconductor substrate;

depositing a first dielectric layer over the cylindrical storage node;

etching the first dielectric layer to reduce a thickness of a portion of the first dielectric layer on a protruded end of the cylindrical storage node;

depositing a second dielectric layer over the etched first dielectric layer, wherein the second dielectric layer supplements a thickness of a portion of the first dielectric layer on a bottom corner of the cylindrical storage node; and

forming a cell plate over the second dielectric layer.

2. The method of claim 1 further comprising etching until the thickness of the portion of the first dielectric layer on the protruded end of the cylindrical storage node becomes thinner than the thickness of the portion of the first dielectric layer on the bottom corner of the cylindrical storage node.

3. The method of claim 1 , wherein forming the cell plate comprises:

forming an adhesion layer comprising titanium zirconium nitride over the second dielectric layer; and

forming a ruthenium (Ru) layer over the adhesion layer.

4. A method for forming a capacitor of a semiconductor device, the method comprising:

forming a cylindrical storage node over a semiconductor substrate;

depositing a first dielectric layer over the cylindrical storage node;

etching the first dielectric layer to expose a surface of a protruded end of the cylindrical storage node;

depositing a second dielectric layer over the etched first dielectric layer and the protruded exposed surface of the end of the cylindrical storage node; and

forming a cell plate over the second dielectric layer.

5. The method of claim 4 , wherein the cylindrical node comprises a titanium nitride (TiN) layer formed by Sequential Flow Deposition (SFD).

6. The method of claim 4 , wherein the first and second dielectric layers are formed by depositing the same dielectric material.

7. The method of claim 4 , wherein the first and second dielectric layers comprise zirconium oxide (ZrO 2 ) layers deposited by Atomic Layer Deposition (ALD).

8. The method of claim 4 further comprising etching using nitrogen trifluoride (NF 3 ) or carbon tetrafluoride (CF 4 ) as an etchant.

9. The method of claim 4 further comprising etching so that a surface of an upper side wall of the cylindrical storage node is further exposed and a portion of the first dielectric layer remains on a bottom corner of the cylindrical storage node.

10. The method of claim 4 further comprising repeating the deposition and etching steps.

11. A method for forming a capacitor of a semiconductor device, the method comprising:

forming a cylindrical storage node over a semiconductor substrate;

depositing a first dielectric layer over the cylindrical storage node;

etching the first dielectric layer to reduce a thickness of a portion of the first dielectric layer on a protruded end of the cylindrical storage node;

depositing a second dielectric layer over the etched first dielectric layer, wherein the second dielectric layer supplements a thickness of a portion of the first dielectric layer on a bottom corner of the cylindrical storage node;

forming an adhesion layer comprising titanium zirconium nitride (TiZrN) over the second dielectric layer; and

forming a cell plate comprising a ruthenium (Ru) layer over the adhesion layer.

12. The method of claim 11 further comprising etching until the thickness of the portion of the first dielectric layer on the protruded end of the cylindrical storage node becomes thinner than the thickness of the portion of the first dielectric layer on the bottom corner of the cylindrical storage node.

13. The method of claim 11 further comprising etching so that a surface of the protruded end of the cylindrical storage node is exposed.

14. The method of claim 11 further comprising etching so that a surface of the protruded end of the cylindrical storage node and a surface of an upper side wall adjoining the protruded end are exposed and a portion of the first dielectric layer is remains on the bottom corner of the cylindrical storage node.

15. The method of claim 11 further comprising forming a titanium nitride (TiN) layer over the ruthenium layer.

16. A method for forming a capacitor of a semiconductor device, the method comprising:

forming a cylindrical storage node over a semiconductor substrate;

depositing a dielectric layer over the cylindrical storage node;

forming an adhesion layer comprising titanium zirconium nitride (TiZrN) over the dielectric layer; and

forming a cell plate comprising a ruthenium (Ru) layer over the adhesion layer.

17. The method of claim 16 , wherein the titanium zirconium nitride (TiZrN) is deposited to a thickness of about 20 Å to about 50 Å and the ruthenium layer is deposited to a thickness of about 200 Å to about 300 Å.

18. The method of claim 16 further comprising forming a titanium nitride (TiN) layer to a thickness of about 300 Å to about 500 Å over the ruthenium layer by Physical Vapor Deposition (PVD).

19. A capacitor of a semiconductor device comprising:

a cylindrical storage node formed over a semiconductor substrate;

a dielectric layer formed over the cylindrical storage node;

an adhesive layer formed comprising titanium zirconium nitride (TiZrN) over the dielectric layer; and

a cell plate comprising a ruthenium (Ru) layer over the adhesion layer.

20. The capacitor of a semiconductor device of claim 19 , wherein the dielectric layer consists of zirconium oxide (ZrO 2 ).

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 24, 2008
From: EUN, BYUNG SOO
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 022028/0185 →