Granted Patent B1

US 7,803,715 · App. 12/345,568 · Granted Sep 28, 2010

Abstract

Claims (37)

1. A method of fabricating a microelectronic device structure, comprising:

forming a multi-layered carbon-based hardmask on a substrate layer; wherein the multi-layered carbon-based hardmask includes a first carbon-based hardmask layer having a first refractive index and a second carbon-based hardmask layer having a second refractive index;

patterning a photo resist layer disposed over the multi-layered carbon-based hardmask; and

etching a pattern into the multi-layered carbon-based hardmask.

2. The method of fabricating a microelectronic device structure as in claim 1 , wherein the first carbon-based hardmask layer is an amorphous carbon layer with a refractive index at 248 nm of at least 2.0 while the second carbon-based hardmask layer is an amorphous carbon layer with a refractive index at 248 nm of less than 2.0.

3. The method of fabricating a microelectronic device structure as in claim 2 , wherein the first carbon-based hardmask layer has a refractive index between 2.04 and 2.08 and wherein the second carbon-based hardmask layer has a refractive index between 1.4 and 1.8.

4. The method of fabricating a microelectronic device structure as in claim 1 , wherein the first carbon-based hardmask layer is deposited to a thickness greater than that of the second carbon-based hardmask layer.

5. The method of fabricating a microelectronic device structure as in claim 4 , wherein the first carbon-based hardmask layer is deposited to a thickness between 8 and 12 times that of the second carbon-based hardmask layer.

6. The method of fabricating a microelectronic device structure as in claim 5 , wherein the second carbon-based hardmask layer has a thickness between 10 nm and 50 nm.

7. A method of fabricating a microelectronic device structure, comprising:

depositing a first carbon-based hardmask layer over a substrate feature layer to be etched;

depositing a second carbon-based hardmask layer on the first carbon-based hardmask layer to form a multi-layered carbon-based hardmask;

forming a patterned photo resist layer over the multi-layered carbon-based hardmask;

etching the multi-layered carbon-based hardmask; and

etching the substrate feature layer.

8. The method of fabricating a microelectronic device structure as in claim 7 , wherein the first and second carbon-based hardmask layers are deposited in PECVD chambers using the same precursor gas ratios.

9. The method of fabricating a microelectronic device structure as in claim 7 , wherein the first carbon-based hardmask layer is a bottom amorphous carbon hardmask layer deposited on the substrate feature layer and wherein the second carbon-based hardmask layer is a top amorphous carbon layer deposited on the bottom amorphous carbon hardmask layer.

10. The method of fabricating a microelectronic device structure as in claim 9 , wherein the bottom amorphous carbon hardmask layer is deposited in a first PECVD chamber and the top amorphous hardmask layer is deposited in a second PECVD chamber.

11. The method of fabricating a microelectronic device structure as in claim 10 , wherein the bottom amorphous carbon hardmask layer is deposited at a temperature at least 50° C. higher than that used for depositing the top amorphous carbon hardmask layer.

12. The method of fabricating a microelectronic device structure as in claim 11 , wherein the bottom amorphous carbon hardmask layer is deposited at a temperature of approximately 550° C. and the top amorphous carbon hardmask layer is deposited at a temperature between 400° C. and 500° C.

13. The method of fabricating a microelectronic device structure as in claim 10 , wherein the first and second PECVD chambers are components of a same sub-atmospheric cluster tool.

14. The method of fabricating a microelectronic device structure as in claim 10 , wherein the bottom amorphous carbon hardmask layer is deposited to a greater thickness than the top amorphous carbon hardmask layer.

15. The method of fabricating a microelectronic device structure as in claim 14 , wherein the bottom amorphous carbon hardmask layer is deposited to a thickness approximately ten times that of the top amorphous carbon hardmask layer.

16. The method of fabricating a microelectronic device structure as in claim 9 , wherein etching the multi-layered carbon hardmask further comprises:

etching the top amorphous carbon hardmask layer with a first plasma process providing a greater than 10:1 etch selectivity over the bottom amorphous carbon hardmask layer, the first plasma process being either oxygen-based and having a first oxygen ion species concentration or being halogen-based;

etching the bottom amorphous carbon hardmask layer with a second plasma process providing a selectivity greater than 5:1 over the top carbon-based hardmask layer, the second plasma process being oxygen-based and having a second oxygen ion species concentration, higher than the first oxygen ion species concentration.

17. The method of fabricating a microelectronic device structure as in claim 16 , wherein the second plasma process is performed at a higher process pressure and RF power than the first plasma process.

18. The method of fabricating a microelectronic device structure as in claim 8 , wherein forming the patterned photo resist layer further comprises:

depositing a photo resist; and

exposing the photo resist with radiation having a wavelength no greater than 248 nm to define a pattern in the photo resist.

19. A computer readable media having instructions stored thereon which when executed by a computer processing system cause the system to perform a method comprising:

depositing a bottom carbon-based hardmask layer over a substrate feature layer to be etched;

depositing a top carbon-based hardmask layer on the bottom carbon-based hardmask layer to form a multi-layered carbon-based hardmask;

forming a patterned photo resist layer over the multi-layered carbon-based hardmask;

etching the multi-layered carbon-based hardmask; and

etching the substrate feature layer.

20. The method of fabricating a microelectronic device structure as in claim 1 , wherein each of the first and second carbon-based hardmask layers is an amorphous carbon layer.

Assignments (9)