Dynamic polarization for reducing stress induced leakage current
View Patent ↗Subject matter disclosed herein relates to non-volatile flash memory, and more particularly to a method of reducing stress induced leakage current.
1. A method comprising:
operating a non-volatile memory device in a standby mode; and
applying a dynamic polarization via a control gate of a memory cell of said non-volatile memory device while said non-volatile memory device is operating in said standby mode, wherein said applying said dynamic polarization further comprises:
applying a control voltage to said control gate, wherein said control voltage comprises amplitude that is:
at least a first amplitude for a first time span; and
less than or equal to a second amplitude for a second time span, wherein said first amplitude is positive and greater than said second amplitude.
2. The method of claim 1 , wherein said non-volatile memory device comprises a flash memory device.
3. The method of claim 1 , wherein said dynamic polarization is applied via a body of said memory cell.
4. The method of claim 1 , further comprising:
storing a “0” state in said memory cell, wherein said “0” state corresponds to a negatively charged floating gate responsive at least in part to said dynamic polarization.
5. The method of claim 1 , wherein said applying said dynamic polarization comprises applying a square wave voltage to said memory cell.
6. The method of claim 1 , wherein said dynamic polarization comprises a pulsed polarization to generate a pulsed electric field between a said floating gate and a substrate of said memory cell.
7. The method of claim 1 , further comprising:
applying said dynamic polarization to a block of memory cells of said non-volatile memory device during said standby mode operation.
8. A non-volatile memory device comprising:
a memory cell array including a memory cell having a control gate; and
a controller adapted to apply a dynamic polarization via said control gate of said memory cell during a standby mode operation of said memory cell, wherein said dynamic polarization comprises a control voltage applied to said control gate, and wherein said control voltage comprises amplitude that is:
at least a first amplitude for a first time span; and
less than or equal to a second amplitude for a second time span, wherein said first amplitude is positive and greater than said second amplitude.
9. The non-volatile memory device of claim 8 , wherein said memory cell array comprises a flash memory cell array.
10. The non-volatile memory device of claim 8 , wherein said dynamic polarization comprises a square wave voltage.
11. The non-volatile memory device of claim 8 , wherein said dynamic polarization comprises a pulsed polarization to generate a pulsed electric field between a floating gate and a substrate of said memory cell.
12. The non-volatile memory device of claim 11 , wherein said memory cell is adapted to store a “0” state, wherein said “0” state corresponds to a floating gate being negatively charged.
13. The non-volatile memory device of claim 8 , further comprising:
a block of memory cells, wherein individual memory cells are adapted to receive said dynamic polarization.
14. The non-volatile memory device of claim 8 , wherein said control gate is connected to a word line of said memory cell array.