Method for encapsulating a high-K gate stack by forming a liner at two different process temperatures
View Patent ↗Encapsulation of a gate stack comprising a high-k dielectric material may be accomplished on the basis of a silicon nitride material that is deposited in a sequence of two deposition processes, in which the first process may be performed on the basis of a moderately low process temperature, thereby passivating sensitive surfaces without unduly contaminating the same, while, in a second deposition process, a moderately high process temperature may be used to provide enhanced material characteristics and a reduced overall cycle time compared to conventional ALD or multi-layer deposition techniques.
1. A method, comprising:
forming a gate stack above a semiconductor layer, said gate stack comprising a high-k dielectric material and a metal-containing material formed on said high-k dielectric material
forming a first oxygen-blocking layer on exposed surface portions of said gate stack in a first deposition ambient at a first process temperature; and
forming a second oxygen-blocking layer on said first oxygen-blocking layer in a second deposition ambient at a second process temperature that is higher than said first process temperature, wherein said first and second deposition ambients are established in the same process reactor, and wherein establishing said second deposition ambient comprises discontinuing supply of first precursor materials after forming said first oxygen-blocking layer on the basis of said first precursor materials, heating said process reactor at a specified rate up to a pre-deposition temperature that corresponds to said second process temperature, maintaining said pre-deposition temperature for a specified stabilization period and supplying second precursor materials to form said second oxygen-blocking layer.
2. A method, comprising:
forming a gate stack above a semiconductor layer, said gate stack comprising a high-k dielectric material and a metal-containing material formed on said high-k dielectric material;
forming a first oxygen-blocking layer on exposed surface portions of said gate stack in a
first deposition ambient at a first process temperature; and
forming a second oxygen-blocking layer on said first oxygen-blocking layer in a second deposition ambient at a second process temperature that is higher than said first process temperature, wherein said first and second deposition ambients are established in the same process reactor, and wherein establishing said second deposition ambient comprises discontinuing supply of first precursor materials after forming said first oxygen-blocking layer on the basis of said first precursor materials, heating said process reactor at a specified rate up to a pre-deposition temperature that is higher than said second process temperature, maintaining said pre-deposition temperature above said second process temperature for a specified overheating period and supplying second precursor materials at said second process temperature to form said second oxygen-blocking layer.
3. The method of claim 1 or 2 , wherein said first oxygen-blocking layer is comprised of silicon nitride.
4. The method of claim 3 , wherein said second oxygen-blocking layer is comprised of silicon nitride.
5. The method of claims 1 or 2 , wherein forming said first oxygen-blocking layer comprises depositing a first sub-layer including a first precursor and depositing a second sub-layer including a second precursor, wherein said first and second precursors react to form at least a portion of said first oxygen-blocking layer.
6. The method of claim 5 , wherein said first process temperature is approximately 550° C. or less.
7. The method of claim 5 , wherein forming said second oxygen-blocking layer comprises performing a thermally activated chemical vapor deposition process.
8. The method of claim 7 , wherein said second process temperature is approximately 700° C. or higher.