IP Library Granted Patent US 8,110,463
Granted Patent B2
US 8,110,463 · App. 12/363,553 · Granted Feb 7, 2012

Method of fabricating semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,110,463
App. No.
12/363,553
Granted
Feb 7, 2012
Kind
B2
Abstract

A method of fabricating a semiconductor device includes a first step of forming a defect suppression film suppressing increase in a defect due to implantation of an impurity on a semiconductor substrate, a second step of forming an active region on a surface of the semiconductor substrate by implanting the impurity through the defect suppression film, a third step of removing the defect suppression film and a fourth step of forming an interface state suppression film suppressing increase in an interface state density of the active region on the active region.

Claims (50)

1. A method of fabricating a semiconductor device comprising:

a first step of forming a defect suppression film suppressing increase in a defect due to implantation of an impurity on a semiconductor substrate so as to cover a surface of a gate electrode of a field-effect transistor and a surface of said semiconductor substrate where a junction transistor and said field-effect transistor are formed;

a second step of forming an active region on a surface of said semiconductor substrate by implanting said impurity through said defect suppression film;

a third step of removing said defect suppression film; and

a fourth step of forming an interface state suppression film suppressing increase in an interface state density of said active region on said active region, wherein

said defect suppression film is capable of suppressing increase in said defect as compared with said interface state suppression film,

said interface state suppression film is capable of suppressing increase in said interface state density as compared with said defect suppression film,

said second step includes:

a step of implanting an impurity for forming a source region and a drain region of said field-effect transistor; and

a step of implanting an impurity for forming any of an emitter region, a collector region, and a base region of said junction transistor, and

said fourth step includes a step of forming said interface state suppression film by depositing an oxide film on said semiconductor substrate on which a gate electrode of said field-effect transistor has been formed, so as to be directly in contact with the surface of said gate electrode, said source region, and said drain region of said field-effect transistor, and, said emitter region, said collector region, and said base region of said junction transistor, respectively, and then annealing said oxide film under an oxygen atmosphere.

2. The method of fabricating a semiconductor device according to claim 1 , further comprising:

a fifth step of removing a part of said interface state suppression film on said active region to form an opening;

a sixth step of forming a metal compound film by metalizing said surface of said semiconductor substrate of said active region which is open;

a seventh step of forming a stress relaxation film on said metal compound film; and

an eighth step of forming a moisture barrier film on said interface state suppression film.

3. The method of fabricating a semiconductor device according to claim 2 , wherein

said stress relaxation film is formed in contact with said interface state suppression film and said moisture barrier film.

4. The method of fabricating a semiconductor device according to claim 2 , wherein

said semiconductor substrate is formed with a junction transistor and a field-effect transistor, and

said fifth step includes a step of removing a part of the interface state suppression film on a surface of said field-effect transistor and on the active region of said junction transistor to form an opening.

5. The method of fabricating a semiconductor device according to claim 1 , wherein

said first step includes a step of forming said defect suppression film by depositing a silicon nitride film on said semiconductor substrate.

6. The method of fabricating a semiconductor device according to claim 1 , wherein

said third step includes a step of removing said defect suppression film formed on said semiconductor substrate by wet etching.

7. The method of fabricating a semiconductor device according to claim 2 , wherein

said seventh step includes a step of forming said stress relaxation film by depositing a silicon oxide film on a surface of said metal compound film and a surface of said interface state suppression film.

8. The method of fabricating a semiconductor device according to claim 2 , wherein

said eighth step includes a step of forming said moisture barrier film by depositing a silicon nitride film on a surface of said stress relaxation film.

9. A method of fabricating a semiconductor device comprising:

a first step of forming a defect suppression film made of a silicon nitride film suppressing increase in a defect due to implantation of an impurity on a silicon substrate so as to cover a surface of a gate electrode of a field effect transistor and a surface of said silicon substrate where a junction transistor and said field-effect transistor are formed;

a second step of forming an active region on a surface of said silicon substrate by implanting said impurity through said defect suppression film;

a third step of removing said defect suppression film; and

a fourth step of forming an interface state suppression film made of a silicon oxide film suppressing increase in an interface state density of said active region on said active region, wherein,

said fourth step includes a step of forming said interface state suppression film by depositing an oxide film on said silicon substrate on which a gate electrode of said field-effect transistor has been formed, so as to be directly in contact with the surface of said gate electrode, said source region, and said drain region of said field-effect transistor, and said emitter region, said collector region, and said base region of said junction transistor, respectively, and then annealing said oxide film under an oxygen atmosphere, and wherein

said second step includes:

a step of implanting an impurity for forming a source region and a drain region of said field-effect transistor; and

a step of implanting an impurity for forming any of an emitter region, a collector region and a base region of said junction transistor.

10. The method of fabricating a semiconductor device according to claim 9 , further comprising:

a fifth step of removing a part of said interface state suppression film on said active region to form an opening;

a sixth step of forming a metal silicide film by siliciding a surface of said silicon substrate of said active region which is open,

a seventh step of forming a stress relaxation film made of a silicon oxide film on said metal silicide film; and

an eighth step of forming a moisture barrier film made of a silicon nitride film on said interface state suppression film.

11. The method of fabricating a semiconductor device according to claim 10 , wherein

said stress relaxation film is formed in contact with said interface state suppression film and said moisture barrier film.

12. The method of fabricating a semiconductor device according to claim 10 , wherein

said silicon substrate is formed with a junction transistor and a field-effect transistor, and

said fifth step includes a step of removing a part of the interface state suppression film on a surface of said field-effect transistor and on the active region of said junction transistor to form an opening.

13. The method of fabricating a semiconductor device according to claim 9 , wherein

said third step includes a step of removing said defect suppression film formed on said silicon substrate by wet etching.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033813 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 21, 2015
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034816/0510 →
CHANGE OF NAME Recorded Dec 3, 2014
From: SANYO SEMICONDUCTOR CO., LTD
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 034537/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033813/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2009
From: SHIMADA, SATORU; TAKEDA, YASUHIRO; OTAKE, SEIJI
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 022184/0039 →