IP Library Granted Patent US 7,994,614
Granted Patent B2
US 7,994,614 · App. 12/382,540 · Granted Aug 9, 2011

Semiconductor wafer, semiconductor device, and method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,994,614
App. No.
12/382,540
Granted
Aug 9, 2011
Kind
B2
Abstract

Provided is a semiconductor wafer with a scribe line region and a plurality of element forming regions partitioned by the scribe line region, the semiconductor wafer including: conductive patterns formed in the scribe line region; and an island-shaped passivation film formed above at least a conductive pattern, which is or may be exposed to a side surface of a semiconductor chip obtained by dicing the semiconductor wafer along the scribe line region, among the conductive patterns, so that the island-shaped passivation film is opposed to the conductive pattern.

Claims (23)

1. A semiconductor wafer with a scribe line region and a plurality of element forming regions partitioned by the scribe line region, the semiconductor wafer comprising:

conductive patterns formed in the scribe line region; and

an island-shaped passivation film formed above at least a conductive pattern, wherein the conductive pattern is or may be exposed to a dicing-cut surface of a semiconductor chip obtained by dicing the semiconductor wafer along the scribe line region, among the conductive patterns, so that the island-shaped passivation film is opposed to the conductive pattern.

2. The semiconductor wafer according to claim 1 , wherein the island-shaped passivation film includes, at both ends thereof, regions being not opposed to the conductive pattern in side view.

3. The semiconductor wafer according to claim 1 , wherein the island-shaped passivation film has an opening formed therein to penetrate the island-shaped passivation film and reach the conductive pattern.

4. The semiconductor wafer according to claim 2 , wherein the island-shaped passivation film has an opening formed therein to penetrate the island-shaped passivation film and reach the conductive pattern.

5. The semiconductor wafer according to claim 1 , wherein the conductive pattern comprises a metal pattern.

6. A semiconductor device comprising a semiconductor chip, wherein:

the semiconductor chip comprises:

an element forming region formed on a semiconductor substrate; and

a frame region formed outside the element forming region on the semiconductor substrate;

the frame region includes an island-shaped passivation film exposed to a dicing-cut surface; and

the island-shaped passivation film is separated from a passivation film formed in the element forming region.

7. The semiconductor device according to claim 6 , further comprising a conductive pattern exposed to the dicing-cut surface and formed below the island-shaped passivation film exposed to the dicing-cut surface,

wherein the conductive pattern is formed to be opposed to the island-shaped passivation film at the dicing-cut surface.

8. The semiconductor device according to claim 7 , wherein the island-shaped passivation film include, at both ends thereof, regions being not opposed to the conductive pattern in side view.

9. The semiconductor device according to claim 6 , wherein an interlayer insulating film is exposed in a region being not coated with the island-shaped passivation film of the frame region.

10. The semiconductor device according to claim 7 , wherein an interlayer insulating film is exposed in a region being not coated with the island-shaped passivation film of the frame region.

11. The semiconductor device according to claim 8 , wherein an interlayer insulating film is exposed in a region being not coated with the island-shaped passivation film of the frame region.

12. The semiconductor device according to claim 9 , wherein the interlayer insulating film exposed in the region of the frame region comprises a bottom surface of a recess formed in the interlayer insulating film, the region being not coated with the island-shaped passivation films.

13. The semiconductor wafer according to claim 1 , further comprising a recess separating an element forming region from the scribe line region.

14. The semiconductor wafer according to claim 1 , wherein a width of a dice-cutting region is smaller than a width of the conductive pattern.

15. The semiconductor wafer according to claim 1 , further comprising an opening formed above the conductive pattern.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2009
From: TANAKA, KOUJI; ISOZAKI, SEIYA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022457/0186 →