Structured virtual registers for embedded controller devices
View Patent ↗Techniques for using structured virtual registers in embedded systems are described. A virtual register structure definition provides a map of virtual registers within an embedded controller. The virtual registers are externally accessible and correspond to memory locations within the embedded controller. In various embodiments, an embedded controller and/or an external entity may store data in or read data from the virtual registers using the virtual register structure definition. The problems of manual tracking of virtual register addresses and manual transcription of virtual register addresses to program code are ameliorated. When the virtual register map changes, logical references in program code to particular virtual registers need not necessarily be changed.
1. A system comprising:
an embedded processor;
an embedded memory coupled to the embedded processor, wherein the embedded memory has a plurality of memory locations;
wherein the embedded memory stores a first virtual register structure definition useable by the embedded processor to store data at one or more first portions of the plurality of memory locations;
wherein the one or more first portions of the plurality of memory locations are externally accessible as a plurality of virtual registers to a host processor using the first virtual register structure definition;
wherein the first virtual register structure definition is operable to be modified to produce a second virtual register structure definition that is useable by the embedded processor to store data at one or more second portions of the plurality of memory locations; and
wherein the one or more second portions of the plurality of memory locations are externally accessible as a plurality of virtual registers to a host processor using the second virtual register structure definition.
2. The system of claim 1 , wherein the embedded memory comprises:
a data memory store, wherein the data memory store contains the plurality of memory locations; and
a program memory store, wherein the program memory store contains instructions executable by the embedded processor to generate the data.
3. The system of claim 1 ,
wherein the first and second virtual register structure definitions, when used as part of an executable program, will result in a same memory mapping for the first portions of the plurality of memory locations.
4. The system of claim 1 , further comprising:
a plurality of sensors and/or a plurality of devices coupled to the embedded memory and operable to acquire the data.
5. A non-transitory computer readable memory medium comprising a plurality of memory locations, wherein the computer readable memory medium stores:
at least one virtual register structure definition; and
program instructions executable by an embedded processor and operable with the at least one virtual register structure definition to store environmental monitoring data in one or more particular locations of the plurality of memory locations;
wherein the one or more particular locations of the plurality of memory locations are externally accessible as a plurality of virtual registers to a host processor using the at least one virtual register structure definition;
wherein the at least one virtual register structure definition is modifiable to produce at least a second virtual register structure definition, wherein additional program instructions are executable to cause the embedded processor to store environmental monitoring data at one or more additional locations of the plurality of memory locations; and
wherein the one or more additional locations of the plurality memory locations are externally accessible as a plurality of virtual registers to the host processor using the at least a second virtual register structure definition.
6. The non-transitory computer readable memory medium of claim 5 , wherein the program instructions are executable by the embedded processor to generate the environmental monitoring data prior to storing the data in the one or more particular locations of the plurality of embedded memory locations.
7. A system, comprising:
a host processor coupled to a host memory;
wherein the host memory contains:
at least one virtual register structure definition; and
instructions executable by the host processor and operable with the at least one virtual register structure definition to read data from one or more virtual registers of an embedded controller;
wherein for each one of the virtual registers, the at least one virtual register structure definition is usable by the host processor to determine a corresponding memory address of a particular memory location for that virtual register of the embedded controller;
wherein the at least one virtual register structure definition is operable to be modified to produce at least one expanded virtual register structure definition that is useable by the host processor to read data from one or more additional virtual registers of the embedded controller; and
wherein for each of the one or more additional virtual registers, the at least one expanded virtual register structure definition is usable by the host processor to determine a corresponding memory address of a particular memory location for that additional virtual register.
8. The system of claim 7 ,
wherein the instructions are executable to read data from the one or more virtual registers of the embedded controller using direct memory access.
9. The host computer system of claim 8 ,
wherein the instructions are executable to store data in the one or more virtual registers of the embedded controller using direct memory access.
10. A non-transitory computer readable memory medium storing:
a virtual register structure definition that contains information indicating one or more particular memory locations within an embedded controller that correspond to a plurality of virtual registers of the embedded controller; and
program instructions executable by a host processor and operable with the virtual register structure definition to read data from the plurality of virtual registers of the embedded controller;
wherein the virtual register structure definition is operable to be modified to produce a second virtual register structure definition that contains information indicating one or more additional memory locations within the embedded controller that correspond to an additional plurality of virtual registers of the embedded controller;
wherein the second virtual register structure definition is useable by the host processor to read data from the additional plurality of virtual registers of the embedded controller.
11. The non-transitory computer readable memory medium of claim 10 , wherein the instructions are executable by the host processor to store data in the plurality of virtual registers of the embedded controller; and
wherein the instructions are executable by the host processor to read data from and store data in the plurality of virtual registers using direct memory access.
12. A computer system, comprising:
a host processor coupled to a host memory; and
an embedded controller comprising an embedded processor coupled to an embedded memory;
wherein the host memory and the embedded memory each contain at least one virtual register structure definition;
wherein the host memory contains host instructions executable by the host processor and operable with the at least one virtual register structure definition contained in the host memory to read data from a plurality of virtual registers corresponding to one or more locations in the embedded memory of the embedded controller;
wherein the at least one virtual register structure definition is operable to be modified to produce at least a second virtual register structure definition that contains information indicating one or more additional locations in the embedded memory of the embedded controller that correspond to an additional one or more virtual registers of the embedded controller;
wherein the at least a second virtual register structure definition is useable by the host processor to read data from the additional one or more virtual registers of the embedded controller.
13. The system of claim 12 , further comprising:
a plurality of temperature sensors coupled to the embedded controller;
wherein the embedded memory contains embedded instructions executable by the embedded processor and operable with the at least one virtual register structure definition contained in the embedded memory to acquire data from the plurality of temperature sensors and store the acquired data in one or more of the plurality of virtual registers.
14. The system of claim 12 , wherein the host instructions are executable by the host processor to attempt to store data in the plurality of virtual registers; and
wherein the embedded memory contains embedded instructions executable by the embedded processor to selectively prevent modification of the contents of one or more of the plurality of virtual registers.