Semiconductor device and manufacturing method thereof
View Patent ↗In a semiconductor device, a region under a pad electrode with a bump can be utilized efficiently and a large amount of force is prevented from applying locally to a semiconductor substrate under the bump when the semiconductor device is mounted. A first layer metal wiring is formed on the semiconductor substrate. A pad electrode is formed on the first layer metal wiring through an interlayer insulation film. The pad electrode is connected with the first layer metal wiring through a via hole that is formed in the interlayer insulation film. A protection film is formed on the pad electrode. The protection film has an opening to expose the pad electrode and an island-shaped protection film formed in the opening. An Au bump connected with the pad electrode through the opening in the protection film is formed on the pad electrode. The via hole is formed under the island-shaped protection film, and incompletely filled with a portion of the pad electrode.
1. A semiconductor device comprising:
a semiconductor substrate;
a lower layer wiring disposed on the semiconductor substrate;
an interlayer insulation film having a via hole and disposed on the lower layer wiring;
a pad electrode disposed on the interlayer insulation film so as to occupy part of the via hole and to be connected to the lower layer wiring;
a protection film disposed on the pad electrode so as to occupy part of the via hole and comprising an island portion and a peripheral portion that are separated from each other so as to have an opening between the island portion and the peripheral portion; and
a protruding electrode disposed on the protection film and connected to the pad electrode through the opening in the protection film,
wherein in plan view of the semiconductor device the island portion overlaps with the via hole.
2. The semiconductor device of claim 1 , further comprising another island portion of the protection film that is separated from the island portion and the peripheral portion of the protection film.
3. The semiconductor device of claim 1 , further comprising another via hole in the interlayer insulation film for connection between the lower layer wiring and the pad electrode that overlaps with the island portion in plan view of the semiconductor device.
4. The semiconductor device of claim 2 , further comprising another via hole in the interlayer insulation film for connection between the lower layer wiring and the pad electrode that overlaps with the island portion in plan view of the semiconductor device.
5. The semiconductor device of claim 1 , further comprising a semiconductor element formed in the semiconductor substrate so as to overlap with the protruding electrode in plan view of the semiconductor device.
6. The semiconductor device of claim 2 , further comprising a semiconductor element formed in the semiconductor substrate so as to overlap with the protruding electrode in plan view of the semiconductor device.
7. The semiconductor device of claim 3 , further comprising a semiconductor element formed in the semiconductor substrate so as to overlap with the protruding electrode in plan view of the semiconductor device.
8. The semiconductor device of claim 4 , further comprising a semiconductor element formed in the semiconductor substrate so as to overlap with the protruding electrode in plan view of the semiconductor device.
9. The semiconductor device of claim 1 , wherein the protection film comprises a silicon oxide film and a silicon nitride film.