IP Library Granted Patent US 8,039,359
Granted Patent B2
US 8,039,359 · App. 12/395,076 · Granted Oct 18, 2011

Method of forming low capacitance ESD device and structure therefor

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Quick Facts
Patent No.
US 8,039,359
App. No.
12/395,076
Granted
Oct 18, 2011
Kind
B2
Abstract

In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.

Claims (31)

1. A method of forming an ESD device comprising:

providing a semiconductor substrate of a first conductivity type and having a first peak doping concentration;

forming a first semiconductor region of a second conductivity type and at least approximately the first peak doping concentration wherein the first semiconductor region forms a first P-N junction with the semiconductor substrate;

forming an epitaxial layer on the first semiconductor region wherein the epitaxial layer has the second conductivity type and a second peak doping concentration;

forming a first doped region of the first conductivity type on the epitaxial layer and overlying the first semiconductor region;

forming a first isolation trench extending vertically from a top surface of the epitaxial layer through the first semiconductor region and into the semiconductor substrate wherein the first isolation trench extends laterally around an outside perimeter of the first doped region; and

forming a second doped region of the second conductivity type on the epitaxial layer and overlying a portion of the semiconductor substrate but not overlying the first semiconductor region.

2. The method of claim 1 forming the second doped region of the second conductivity type includes forming the second doped region with approximately the first peak doping concentration and on the epitaxial layer.

3. The method of claim 1 further including forming a second isolation trench extending vertically from a top surface of the epitaxial layer through the epitaxial layer and into the semiconductor substrate wherein the second isolation trench extends laterally around an outside perimeter of the second doped region.

4. The method of claim 1 further including forming third doped region of the first conductivity type within the second doped region wherein a P-N junction formed between the second and third doped regions forms a zener diode.

5. The method of claim 1 wherein forming the first isolation trench includes forming an opening from the top surface of the epitaxial layer through the first doped region and into the semiconductor substrate and forming a dielectric within the opening.

6. The method of claim 1 wherein forming the first semiconductor region includes forming the first P-N junction as a junction of a zener diode wherein the first peak doping concentration is formed to be no less than approximately 1×10 19 atoms/cm 3 and the second peak doping concentration is formed to be no greater than approximately 1×10 17 atoms/cm 3 .

7. The method of claim 1 wherein forming the first doped region. includes forming a second P-N junction between the first doped region and the epitaxial layer and using the second P-N junction as a junction of a diode.

8. A method of forming a semiconductor device comprising:

providing a semiconductor substrate of a first conductivity type and having a first peak doping concentration wherein the semiconductor substrate has first and second surfaces;

forming a first semiconductor region of a second conductivity type and adjacent to a portion of dopants of the semiconductor substrate wherein the first semiconductor region forms a first P-N junction with the dopants of the semiconductor substrate and wherein the first P-N junction forms a zener diode;

forming a second semiconductor region on the first semiconductor region wherein the second semiconductor region has the second conductivity type and a second peak doping concentration;

forming a first P-N diode that includes a first doped region of the first conductivity type and approximately the first peak doping concentration on the second semiconductor region and overlying at least a portion of the first semiconductor region;

forming a first isolation trench extending vertically from a top surface of the second semiconductor region through the first semiconductor region and into the semiconductor substrate wherein the first isolation trench extends laterally around an outside perimeter of the first doped region; and

forming a second doped region of the second conductivity type and approximately the first peak doping concentration on the second semiconductor layer and overlying a portion of the semiconductor substrate but not overlying the first semiconductor region.

9. The method of claim 8 wherein forming the second semiconductor region includes forming the second semiconductor region with a thickness that is between approximately two to twenty microns.

10. The method of claim 9 wherein forming the first semiconductor region includes forming the first semiconductor region with a thickness of approximately one to three microns.

11. The method of claim 8 wherein forming the second semiconductor region includes forming the second semiconductor region with the second peak doping concentration that is no greater than approximately 1×10 17 atoms/cm 3 ; and forming the first peak doping concentration to be no less than approximately 1×10 19 atoms/cm 3 .

12. A method of forming a semiconductor device comprising:

providing a semiconductor substrate of a first conductivity type and having a first peak doping concentration wherein the semiconductor substrate has first and second surfaces;

forming a first semiconductor region of a second conductivity type and adjacent to a portion of dopants of the semiconductor substrate wherein the first semiconductor region forms a first P-N junction with the dopants of the semiconductor substrate and wherein the first P-N junction forms a zener diode;

forming a second semiconductor region on the first semiconductor region and on a portion of the first surface of the semiconductor substrate wherein the second semiconductor region has the second conductivity type and a second peak doping concentration;

forming a first P-N diode that includes a first doped region of the first conductivity type and approximately the first peak doping concentration on the second semiconductor region and overlying at least a portion of the first semiconductor region;

forming a first isolation trench extending vertically from a top surface of the second semiconductor region through the first semiconductor region and into the semiconductor substrate wherein the first isolation trench extends laterally around an outside perimeter of the first doped region;

forming a second doped region of the second conductivity type and approximately the first peak doping concentration on the second semiconductor region wherein the second doped region is spaced apart from the first doped region and is not overlying the first semiconductor region; and

forming a second isolation trench extending vertically from the top surface of the second semiconductor region and into the semiconductor substrate wherein the second isolation trench extends laterally around an outside perimeter of the second doped region.

Assignments (2)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →