IP Library Granted Patent US 8,912,102
Granted Patent B2
US 8,912,102 · App. 12/396,441 · Granted Dec 16, 2014

Laser annealing

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Quick Facts
Patent No.
US 8,912,102
App. No.
12/396,441
Granted
Dec 16, 2014
Kind
B2
Abstract

A system for and method of processing an article such as a semiconductor wafer is disclosed. The wafer includes first and second surfaces which are segmented into a plurality of first and second zones. The first surface of the wafer, for example, on which devices or ICs are formed is processed by, for example, laser annealing while the second surface is heated with a backside heating source. Corresponding, or at least substantially corresponding, zones on the first and second surfaces are processed synchronously to reduce variations of post laser anneal thermal budget across the wafer.

Claims (36)

1. A method of semiconductor fabrication which reduces large variations of resistance across a semiconductor wafer comprising:

providing the semiconductor wafer having first and second opposing surfaces, the first surface is segmented into a plurality of first zones and the second surface is segmented into a plurality of second zones, wherein the first zones on the first surface have at least substantially corresponding second zones on the second surface;

processing the first zones on the first surface in a first ordered sequence to activate dopants in the semiconductor wafer; and

processing the corresponding second zones on the second surface in a second ordered sequence,

wherein processing the first and corresponding second zones in the first and second ordered sequences simultaneously and synchronously reduces the problem of large variations of resistance across the semiconductor wafer.

2. The method of claim 1 wherein processing the first zones on the first surface comprises scanning the first surface with an excitation system, wherein scanning processes a row of zones.

3. The method of claim 2 wherein the excitation system comprises a laser excitation source.

4. The method of claim 2 wherein the excitation system comprises a laser excitation source and an optical system for focusing an excitation image from the excitation source onto the first surface of the semiconductor wafer.

5. The method of claim 4 wherein the excitation system is translated to process the zones on the first surface.

6. The method of claim 1 wherein processing the zones on the first surface comprises repeatedly scanning the first surface with an excitation system to repeatedly process rows of zones, in the first ordered sequence, until all zones are processed.

7. The method of claim 6 wherein the excitation system comprises a laser excitation source.

8. The method of claim 6 wherein the excitation system comprises a laser excitation source and an optical system for focusing an excitation image from the excitation source onto the first surface of the semiconductor wafer.

9. The method of claim 8 wherein the excitation system is translated to process the zones on the first surface.

10. The method of claim 1 wherein processing the zones on the first and second surfaces comprises heating the zones on the first and second surfaces.

11. The method of claim 1 wherein the first zones on the first surface is processed by a first heating source and the corresponding second zones on the second surface is processed by a second heating source, and wherein the first and second heating sources are different types of heating sources.

12. The method of claim 1 wherein the first zones of the first surface is processed in the first ordered sequence in a first direction and the corresponding second zones of the second surface is processed in the second ordered sequence in the same first direction.

13. The method of claim 12 wherein the first direction is parallel to the first surface of the semiconductor wafer.

14. The method of claim 1 wherein processing the corresponding second zones on the second surface comprises heating the second surface with a second surface heating source.

15. The method of claim 14 wherein the second surface heating source comprises a lamp array.

16. A method of fabricating a semiconductor device comprising:

providing a semiconductor wafer having first and second opposing surfaces, the first surface is segmented into a plurality of first zones and the second surface is segmented into a plurality of second zones, wherein the first zones on the first surface have at least substantially corresponding second zones on the second surface;

processing the first zones on the first surface in a first ordered sequence to activate dopants in the semiconductor wafer; and

processing the corresponding second zones on the second surface in a second ordered sequence,

wherein processing the first and corresponding second zones in the first and second ordered sequences reduce the problem of large variations of resistance across the semiconductor wafer.

17. The method of claim 16 wherein the first zones of the first surface is processed in the first ordered sequence in a first direction which is parallel to the first surface and the corresponding second zones of the second surface is processed in the second ordered sequence in the same first direction.

18. The method of claim 16 wherein processing the zones on the first surface comprises scanning the first surface of the article with an excitation system, wherein scanning processes a row of zones.

19. The method of claim 18 wherein the excitation system comprises a laser excitation source.

20. The method of claim 16 wherein:

the first zones on the first surface is processed by a first heating source and the corresponding second zones on the second surface is processed by a second heating source, and wherein the first and second heating sources are different types of heating sources.

21. A method of semiconductor fabrication comprising:

providing a semiconductor wafer having first and second opposing surfaces, the first surface is segmented into a plurality of first zones and the second surface is segmented into a plurality of second zones, wherein the first zones on the first surface have at least substantially corresponding second zones on the second surface;

processing the first zones on the first surface in a first ordered sequence in a first direction to activate dopants in the semiconductor wafer;

processing the corresponding second zones on the second surface in a second ordered sequence in the same first direction,

wherein processing the first and corresponding second zones in the first and second ordered sequences simultaneously reduce the problem of large variations of resistance across the semiconductor wafer.

22. The method of claim 21 wherein the first zones on the first surface is processed by a first heating source and the corresponding second zones on the second surface is processed by a second heating source, and wherein the first and second heating sources are different types of heating sources.

23. The method of claim 21 wherein the first direction is parallel to the first surface of the semiconductor wafer.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 19, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 054481/0673 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2020
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 054600/0031 →
RELEASE OF SECURITY INTEREST Recorded Nov 18, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054475/0718 →
SECURITY AGREEMENT Recorded Nov 27, 2018
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 047660/0203 →
CHANGE OF NAME Recorded Nov 13, 2014
From: CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 034237/0576 →
CHANGE OF NAME Recorded Nov 13, 2014
From: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
To: CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
Reel/Frame 034237/0574 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2009
From: POON, CHYIU HYIA; SEE, ALEX KH; ZHOU, MEISHENG
To: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
Reel/Frame 022334/0178 →