Semiconductor device and manufacturing method thereof
View Patent ↗A semiconductor device comprises a package substrate, a semiconductor chip, a plurality of bump electrodes and one or more dummy chips. The semiconductor chip is mounted on one surface of the package substrate. The bump electrodes are the other surface of the package substrate and electrically connected to the semiconductor chip through a wiring structure. Each of the dummy chips is mounted on a predetermined region close to a corner portion of the semiconductor chip on the one surface of the package substrate. In the semiconductor chip, the dummy chips are formed of material having the same or similar coefficient of thermal expansion as that of the semiconductor chip. Therefore the stress caused by a difference between coefficients of thermal expansion is suppressed so as to improve connection reliability.
1. A semiconductor device comprising:
a package substrate;
a semiconductor chip mounted on one surface of said package substrate;
a plurality of bump electrodes mounted on another surface of said package substrate and electrically connected to said semiconductor chip through a wiring structure; and
one or more other chips each mounted on a predetermined region close to a corner portion of said semiconductor chip on the one surface of said package substrate such that deformation of the substrate during temperature fluctuation is limited to prevent fracturing of the bump electrodes,
wherein said other chips are formed of material having a same or similar coefficient of thermal expansion as that of said semiconductor chip.
2. The semiconductor device according to claim 1 , wherein said other chips are formed with approximately a same thickness as that of said semiconductor chip.
3. The semiconductor device according to claim 1 , wherein two said other chips are mounted on two regions along opposite two sides of said semiconductor chip.
4. The semiconductor device according to claim 3 , wherein part of a wiring structure for connecting pads of said semiconductor chip to said bump electrodes is formed on each of said other chips.
5. The semiconductor device according to claim 1 , further comprising:
an encapsulant made of an insulating resin formed on one surface of the package substrate and further covering the semiconductor chip, the other chip and the wiring structure.
6. The semiconductor device according to claim 5 , wherein part of the other chips are exposed from the encapsulant.
7. The semiconductor device according to claim 1 , wherein said other chips are silicon chips.
8. The semiconductor device according to claim 1 , wherein said other chips are dummy chips.
9. A semiconductor device comprising:
a package substrate;
a semiconductor chip mounted on one surface of said package substrate;
a plurality of bump electrodes mounted on another surface of said package substrate and electrically connected to said semiconductor chip through a wiring structure; and
one or more other chips each mounted on a predetermined region close to a corner portion of said semiconductor chip on the one surface of said package substrate,
wherein said other chips are formed of material having a same or similar coefficient of thermal expansion as that of said semiconductor chip, and
wherein four said other chips are mounted on four regions close to four corner portions of said semiconductor chip.
10. The semiconductor device according to claim 9 , wherein said other chips are arranged so that two adjacent sides of each of said other chips overlap two sides of said package substrate.
11. The semiconductor device according to claim 9 wherein other said other chips are mounted on regions adjacent to each of the four said other chips.
12. A semiconductor device comprising:
a package substrate;
a semiconductor chip mounted on one surface of the package substrate;
a plurality of bump electrodes mounted on another surface of the package substrate and electrically connected to the semiconductor chip through a wiring structure; and
one or more other chips each mounted on a predetermined region close to a corner portion of the semiconductor chip such that deformation of the substrate during temperature fluctuation is limited to prevent fracturing of the bump electrodes.
13. The semiconductor device according to claim 12 , wherein the one or more other chips are formed approximately the same in thickness as the semiconductor chip.
14. The semiconductor device according to claim 12 , wherein first and second other chips are provided as the one or more other chips, the first and second other chips being mounted on two regions respectively along first and second sides of the semiconductor chip which are opposite to each other.
15. The semiconductor device according to claim 14 , wherein part of a wiring structure for connecting pads of the semiconductor chip to the bump electrodes is formed on each of the other chips.
16. The semiconductor device according to claim 12 , wherein said one or more other chips are each mounted on the predetermined region close to the corner portion of the semiconductor chip such that deformation of the substrate at the corner portion of the semiconductor chip is limited during the temperature fluctuation to prevent the fracturing of the bump electrodes.
17. The semiconductor device according to claim 12 , wherein said one or more other chips are each mounted on the predetermined region close to the corner portion of the semiconductor chip such that the deformation of the substrate during the temperature fluctuation is limited to prevent the fracturing of the bump electrodes located at a region of the other surface of the package substrate corresponding to the corner portion of the semiconductor chip.
18. A semiconductor device comprising:
a package substrate;
a semiconductor chip mounted on one surface of the package substrate;
a plurality of bump electrodes mounted on another surface of the package substrate and electrically connected to the semiconductor chip through a wiring structure; and
one or more other chips each mounted on a predetermined region close to a corner portion of the semiconductor chip,
wherein first, second, third and fourth other chips are provided as the one or more other chips, the first to fourth other chips being mounted respectively on four regions close respectively to four corner portions of the semiconductor chip.
19. The semiconductor device according to claim 18 , wherein the first, second, third and fourth other chips are arranged so that two adjacent sides of each of the other chips overlap two sides of the package substrate.
20. The semiconductor device according to claim 18 , wherein fifth, sixth, seventh, eighth, ninth, tenth, eleventh and twelfth other chips are provided as the one or more other chips,
the fifth and sixth other chips being mounted respectively on two regions close respectively to two adjacent sides of the first other chip, the two adjacent sides facing to the one of the corner portions of the semiconductor chip,
the seventh and eighth other chips being mounted respectively on two regions close respectively to two adjacent sides of the second other chip, the two adjacent sides facing to the one of the corner portions of the semiconductor chip,
the ninth and tenth other chips being mounted respectively on two regions close respectively to two adjacent sides of the third other chip, the two adjacent sides facing to the one of the corner portions of the semiconductor chip, and
the eleventh and twelfth other chips being mounted respectively on two regions close respectively to two adjacent sides of the fourth other chip, the two adjacent sides facing to the one of the corner portions of the semiconductor chip.