IP Library Granted Patent US 8,102,167
Granted Patent B2
US 8,102,167 · App. 12/404,979 · Granted Jan 24, 2012

Phase-cut dimming circuit

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Quick Facts
Patent No.
US 8,102,167
App. No.
12/404,979
Granted
Jan 24, 2012
Kind
B2
Abstract

Methods, systems, and devices are described for sensing a phase-cut dimming signal and outputting a control signal compatible with a switching power circuit. Embodiments of the invention generate at least one of a low-frequency pulse-wave-modulated control signal, an analog output control signal, or a digital (e.g., higher-frequency pulse-wave-modulated) output control signal. Some embodiments further provide preloading and/or startup control functionality to allow proper functioning of the circuitry under small-conduction-angle (i.e., highly dimmed) conditions.

Claims (109)

1. A dimmer controller circuit arrangement for use in a phase-cut dimming environment, the circuit arrangement comprising:

a sensing module, configured to detect a conduction angle from a phase-cut voltage signal, the phase-cut voltage signal being generated by periodically cutting a periodic input voltage signal at the conduction angle;

a logic processing module in operative communication with the sensing module and configured to generate a modulated output signal as a function of the conduction angle; and

a load control signal generator module, in operative communication with the logic processing module and configured to

generate a proportional output signal as a function of the modulated output signal;

buffer the proportional output signal to generate an analog output signal such that the analog output signal is mathematically related to the conduction angle; and

output a load control signal responsive to the analog output signal.

2. The circuit arrangement of claim 1 , wherein the sensing module comprises:

a first edge sensing unit, configured to sense discontinuous amplitude changes in the phase-cut voltage signal.

3. The circuit arrangement of claim 2 , wherein the sensing module further comprises:

a second edge sensing unit, operable to sense substantially sinusoidal changes in the phase-cut voltage signal; and

a threshold crossing sensor, operable to sense transitions in the phase-cut voltage signal between amplitude values above a threshold voltage and amplitude values below the threshold voltage.

4. The circuit arrangement of claim 3 , wherein the threshold voltage is set to substantially zero volts.

5. The circuit arrangement of claim 1 , wherein the modulated output signal is a pulse-width modulated output signal.

6. The circuit arrangement of claim 1 , wherein the load control signal generator module comprises:

an analog output module configured to generate the analog output signal as a function of the modulated output signal.

7. The circuit arrangement of claim 6 , wherein the analog output module comprises:

a proportional converter module, in operative communication with the logic processing module, and configured to generate the proportional output signal as a function of the modulated output signal; and

an amplifier module configured to buffer the proportional output signal to generate the analog output signal such that the analog output signal is mathematically related to the conduction angle.

8. The circuit arrangement of claim 7 , wherein the proportional converter module generates the proportional output signal as a function of the modulated output signal by:

integrating the modulated output signal to generate an integrated output signal; and

computing the root-mean-squared value of the integrated output signal to generate the proportional output signal.

9. The circuit arrangement of claim 7 , wherein the analog output signal is generated such that the analog output signal is proportional to the conduction angle.

10. The circuit arrangement of claim 1 , wherein the load control signal generator module comprises:

a digital output module configured to generate a digital output signal as a function of the modulated output signal,

wherein the load control signal comprises the digital output signal.

11. The circuit arrangement of claim 10 , wherein the digital output module comprises:

a proportional converter module, in operative communication with the logic processing module, and configured to generate the proportional output signal as a function of the modulated output signal;

an oscillator configured to generate a periodic carrier signal;

a comparator configured to compare the proportional output signal to the carrier signal to generate a modulated signal; and

an amplifier module configured to buffer the modulated signal to generate the digital output signal such that the digital output signal is mathematically related to the conduction angle.

12. The circuit arrangement of claim 7 , further comprising:

a digital output module operatively coupled with the proportional converter module and configured to generate a digital output signal as a function of the proportional output signal,

wherein the load control signal further comprises the digital output signal.

13. The circuit arrangement of claim 12 , wherein the digital output module comprises:

an oscillator configured to generate a periodic carrier signal;

a comparator configured to compare the proportional output signal to the carrier signal to generate a modulated signal; and

an amplifier module configured to buffer the modulated signal to generate the digital output signal such that the digital output signal is mathematically related to the conduction angle.

14. The circuit arrangement of claim 1 , further comprising:

a housing configured to house at least a portion of the sensing module, the logic processing module, and the load control signal generator module.

15. The circuit arrangement of claim 14 , wherein the housing comprises standard integrated circuit packaging having a plurality of interface locations, at least one of the interface locations being configured to provide an interface with the load control signal from components external to the packaging.

16. A circuit arrangement for use with a phase-cut dimming circuit, the circuit arrangement comprising:

a phase-cut dimming module, configured to receive a periodic input voltage signal and cut the input voltage signal at a conduction angle to generate a phase-cut signal;

a rectifier module, configured to rectify the phase-cut voltage signal to generate a bus voltage signal; and

a dimmer controller module, operable to convert the phase-cut voltage signal to a load control signal as a function of the conduction angle, the dimmer controller module comprising:

a sensing module, configured to detect the conduction angle from the phase-cut voltage signal;

a logic processing module in operative communication with the sensing module and configured to generate a modulated output signal as a function of the conduction angle; and

a load control signal generator module, in operative communication with the logic processing module and configured to:

generate a proportional output signal as a function of the modulated output signal;

buffer the proportional output signal to generate an analog output signal such that the analog output signal is mathematically related to the conduction angle; and

output a load control signal responsive to the analog output signal.

17. The circuit arrangement of claim 16 , further comprising:

a preload module, comprising a switched current generator configured to:

generate a current from the bus voltage signal, the current being switched as a function of the modulated output signal and the load control signal; and

convert the current to a source voltage, wherein the dimmer control module is energized by the source voltage.

18. The circuit arrangement of claim 16 , further comprising:

a startup module, comprising:

an under-voltage detector module, configured to compare a source voltage to an under-voltage threshold level, and to generate an under-voltage detect signal when the source voltage falls below the under-voltage threshold level; and

a switched current generator, configured to:

generate a current from the bus voltage signal, the current being switched as a function of the under-voltage detect signal; and

use the current to increase the source voltage, wherein the dimmer control module is energized by the source voltage.

19. The circuit arrangement of claim 16 , further comprising:

a preload/startup module, comprising:

an under-voltage detector module, configured to compare a source voltage to an under-voltage threshold level, and to generate an under-voltage detect signal when the source voltage falls below the under-voltage threshold level;

a pulse generator, configured to generate a pulse signal as a function of the modulated output signal and the load control signal, such that the pulse signal remains low until the conduction angle falls below a dimming threshold level;

a logic component, configured to transition a current switch signal to high when at least one of the under-voltage detect signal is high or the pulse signal is high; and

a switched current generator, configured to:

generate a current from the bus voltage signal, the current being switched as a function of the current switch signal; and

convert the current to the source voltage, wherein the dimmer control module is energized by the source voltage.

20. The circuit arrangement of claim 16 , further comprising:

a load controller module, operatively coupled with the bus voltage signal and the load control signal, and configured to use the load control signal to control a load.

21. The circuit arrangement of claim 16 , further comprising:

a housing configured to house at least a portion of the phase-cut dimming module, the rectifier module, and the dimmer controller module.

22. The circuit arrangement of claim 21 , wherein the housing is configured to fit in a standard dimmer receptacle.

23. A method for controlling a switched load using phase-cut dimming, the method comprising:

receiving a phase-cut voltage signal, the phase-cut voltage signal being generated by periodically cutting a periodic input voltage signal at a conduction angle;

detecting the conduction angle from the phase-cut voltage signal;

generating a modulated output signal as a function of the conduction angle;

generating a load control signal as a function of the modulated output signal;

generating a proportional output signal as a function of the modulated output signal; and

buffering the proportional output signal to generate an analog output signal such that the analog output signal is mathematically related to the conduction angle,

wherein the load control signal comprises the analog output signal.

24. The method of claim 23 , further comprising:

comparing a source voltage to an under-voltage threshold level

generating an under-voltage detect signal when the source voltage falls below the under-voltage threshold level;

generating a pulse signal as a function of the modulated output signal and the load control signal, such that the pulse signal remains low until the conduction angle falls below a dimming threshold level;

transitioning a current switch signal to high when at least one of the under-voltage detect signal is high or the pulse signal is high;

generating a current, the current being switched as a function of the current switch signal; and

using the current to maintain the source voltage substantially within a desired range.

25. The method of claim 23 , wherein detecting the conduction angle from the phase-cut voltage signal comprises:

sensing a discontinuous edge location of the phase-cut voltage signal; and

calculating the conduction angle as a function of the discontinuous edge location.

26. The method of claim 23 , wherein detecting the conduction angle from the phase-cut voltage signal comprises:

sensing a discontinuous edge location of the phase-cut voltage signal;

sensing a first zero-voltage crossing location of the phase-cut voltage signal;

measuring a time duration between the discontinuous edge location and the first zero-voltage crossing location; and

calculating the conduction angle as a function of the time duration between the discontinuous edge location and the first zero-voltage crossing location.

27. The method of claim 26 , further comprising:

sensing a second zero-voltage crossing location of the phase-cut voltage signal subsequent to the first zero-voltage crossing location of the phase-cut voltage signal;

when sensing the second zero-voltage crossing location occurs prior to sensing the discontinuous edge location, calculating the conduction angle as 180-degrees.

28. The method of claim 23 , wherein generating a load control signal comprises generating at least one of an analog output signal or a digital output signal as a function of the modulated output signal.

29. The method of claim 23 , wherein generating a proportional output signal as a function of the modulated output signal comprises:

integrating the modulated output signal to generate an integrated output signal; and

computing the root-mean-squared value of the integrated output signal to generate the proportional output signal.

30. The method of claim 23 , further comprising:

generating a periodic carrier signal;

comparing the proportional output signal to the carrier signal to generate a modulated signal; and

buffering the modulated signal to generate a digital output signal such that the digital output signal is mathematically related to the conduction angle,

wherein the load control signal comprises the digital output signal.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
CHANGE OF NAME Recorded Jan 18, 2018
From: LED DISPLAY TECHNOLOGIES, LLC
To: POLARIS POWERLED TECHNOLOGIES, LLC
Reel/Frame 045084/0315 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Sep 19, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION
Reel/Frame 043902/0544 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2017
From: MICROSEMI CORPORATION
To: LED DISPLAY TECHNOLOGIES, LLC
Reel/Frame 043137/0738 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
NOTICE OF SUCCESSION OF AGENCY Recorded Apr 9, 2015
From: ROYAL BANK OF CANADA (AS SUCCESSOR TO MORGAN STANLEY & CO. LLC)
To: BANK OF AMERICA, N.A., AS SUCCESSOR AGENT
Reel/Frame 035657/0223 →
SUPPLEMENTAL PATENT SECURITY AGREEMENT Recorded Nov 11, 2011
From: MICROSEMI CORPORATION; MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP; MICROSEMI CORP. - MASSACHUSETTS; ACTEL CORPORATION
To: MORGAN STANLEY & CO. LLC
Reel/Frame 027213/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2011
From: ASIC ADVANTAGE INC.
To: MICROSEMI CORPORATION
Reel/Frame 027096/0222 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2009
From: IRISSOU, PIERRE; COLMET-DAAGE, ETIENNE; DREXLER, BERNARD
To: ASIC ADVANTAGE INC.
Reel/Frame 022515/0476 →