Effective gate length circuit modeling based on concurrent length and mobility analysis

1. A computer implemented method to determine metal oxide semiconductor (MOS) gate functional limitations, the computer implemented method comprising:

obtaining a plurality of slices of a MOS gate, the slices each comprising at least one parameter, the parameter comprising a slice gate width and a slice gate length;

determining a current for each slice based on a slice gate length of the slice to form a length-based current for each slice, wherein the current is in a channel adjacent the slice;

determining a length-based current for the MOS gate by summing the length-based current for each slice;

calculating a stress profile for each slice;

determining a slice carrier mobility for each slice based on the stress profile of each slice;

determining a carrier mobility-based current for each slice based on each slice carrier mobility;

determining a carrier mobility for the MOS gate based on the carrier mobility-based current for each slice; and

determining an effective length for the MOS gate based on the length-based current and the carrier mobility for the MOS gate.

2. The computer implemented method of claim 1 , wherein determining an effective length for the MOS gate comprises looking up a gate length from a table for a fixed carrier mobility and current.

3. The computer implemented method of claim 1 , wherein determining an effective length comprises summing currents for each length-based current to determine a gate effective length for the MOS gate, and wherein determining a carrier mobility for the MOS gate comprises summing carrier mobility-based currents for each mobility-based current.

4. The computer implemented method of claim 1 , wherein the MOS gate is a non-rectangular gate.

5. The computer implemented method of claim 1 , wherein calculating the stress profile is based on an addition of silicon-germanium to the MOS gate.

6. The computer implemented method of claim 1 , wherein calculating the stress profile is based on the addition of an integrated circuit feature selected from a group consisting of a silicon nitride liner layer, silicon germanium source/drain region, and shallow trench isolation.

7. The computer implemented method of claim 1 , wherein the plurality of slices comprises a first slice and a second slice, wherein the stress profile for the first slice is not uniform as compared to the stress profile of the second slice.

8. The computer implemented method of claim 1 , wherein the slice gate length is an average of a contour of the gate within the slice.

9. A computer program product comprising a computer usable storage device including computer usable code for determining metal oxide semiconductor (MOS) gate functional limitations, comprising:

computer usable program code configured to obtain a plurality of slices of a MOS gate, the slices each comprising at least one parameter, the parameter comprising a slice gate width and a slice gate length;

computer usable program code configured to determine a current for each slice based on a slice gate length of the slice to form a length-based current for each slice, wherein the current is in a channel adjacent the slice;

computer usable program code configured to determine a length-based current for the MOS gate by summing the length-based current for each slice;

computer usable program code configured to calculate a stress profile for each slice;

computer usable program code configured to determine a slice carrier mobility for each slice based on the stress profile of each slice;

computer usable program code configured to determine a carrier mobility-based current for each slice based on each slice carrier mobility;

computer usable program code configured to determine a carrier mobility for the MOS gate based on the carrier mobility-based current for each slice; and

computer usable program code configured to determine an effective length for the MOS gate based on the length-based current and the carrier mobility for the MOS gate.

10. The computer program product of claim 9 , wherein computer usable program code configured to determine an effective length for the MOS gate comprises computer usable program code configured to look up a gate length from a table for a fixed carrier mobility and current.

11. The computer program product of claim 9 , wherein computer usable program code configured to determine an effective length comprises computer usable program code configured to sum currents for each length-based current to determine a gate effective length for the MOS gate, and wherein computer usable program code configured to determine a carrier mobility for the MOS gate comprises computer usable program code configured to sum carrier mobility-based currents for each mobility-based current.

12. The computer program product of claim 9 , further comprising: computer usable program code configured to circuit simulate the MOS gate based on the effective length for the MOS gate and the carrier mobility for the MOS gate to determine whether the MOS gate functions within tolerances.

13. The computer program product of claim 9 , wherein the MOS gate is a non-rectangular gate.

14. The computer program product of claim 9 , wherein computer usable program code configured to calculate the stress profile is based on an addition of silicon-germanium to the MOS gate.