IP Library Granted Patent US 7,951,682
Granted Patent B2
US 7,951,682 · App. 12/434,716 · Granted May 31, 2011

Method for fabricating capacitor in semiconductor device

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Quick Facts
Patent No.
US 7,951,682
App. No.
12/434,716
Granted
May 31, 2011
Kind
B2
Abstract

A method for fabricating a capacitor in a semiconductor device includes forming an insulation layer over a substrate, forming a storage node contact plug passing through the insulation layer and coupled to the substrate, recessing the storage node contact plug to a certain depth to obtain a sloped profile, forming a barrier metal over the surface profile of the recessed storage node contact plug, forming a sacrificial layer over the substrate structure, etching the sacrificial layer to form an opening exposing the barrier metal, forming a bottom electrode over the surface profile of the opening, and removing the etched sacrificial layer.

Claims (17)

1. A method for fabricating a capacitor in a semiconductor device, comprising:

forming an insulation layer over a substrate;

forming a storage node contact plug passing through the insulation layer and coupled to the substrate;

recessing the storage node contact plug to a certain depth to obtain a sloped profile;

forming a barrier metal over the surface profile of the recessed storage node contact plug;

forming a sacrificial layer over the substrate structure;

etching the sacrificial layer to form an opening exposing the barrier metal;

forming a bottom electrode over the surface profile of the opening; and

removing the etched sacrificial layer.

2. The method of claim 1 , wherein the forming of the storage node contact plug comprises using polysilicon.

3. The method of claim 1 , wherein the forming of the barrier metal comprises using a titanium layer.

4. The method of claim 1 , further comprising, before the forming of the sacrificial layer, forming a conductive material layer over the barrier metal.

5. The method of claim 4 , wherein the conductive material layer comprises substantially the same material as the barrier metal or the storage node contact plug.

6. The method of claim 4 , further comprising, before the forming of the sacrificial layer, forming an etch stop layer over the substrate structure including the conductive material layer.

7. The method of claim 1 , wherein the forming of the bottom electrode comprises using a titanium nitride layer.

8. The method of claim 1 , wherein the forming of the insulation layer and the forming of the sacrificial layer comprise using an oxide-based layer.

9. The method of claim 8 , wherein the removing of the etched sacrificial layer comprises performing a dip out process.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →