Spin transfer MRAM device with separated CCP assisted writing
View Patent ↗A spin-transfer MRAM is described that has two sub-cells each having a conductive spacer between an upper CPP cell and a lower MTJ cell. The two conductive spacers in each bit cell are linked by a transistor which is controlled by a write word line. The two CPP cells in each bit cell have different resistance states and the MTJ cell and CPP cell in each sub-cell have different resistance states. The MTJ free layer rotates in response to switching in the CPP free layer because of a large demagnetization field exerted by the CPP free layer. An improved circuit design is disclosed that enables a faster and more reliable read process since the reference is a second MTJ within the same bit cell. When R MTJ1 >R MTJ2 , the bit cell has a “0” state, and when R MTJ1 <R MTJ2 , the bit cell has a “1” state.
1. A spin-transfer MRAM structure comprising a bit cell array wherein each bit cell has two sub-cells which are a first sub-cell and a second sub-cell, and each sub-cell comprises:
(a) a MTJ cell formed on a bottom electrode wherein the MTJ cell has a first free layer and a first synthetic pinned layer that are separated by a tunnel barrier layer, said MTJ cell has a near zero anisotropy, and said first free layer has a magnetization that is oriented anti-parallel to a magnetization direction in an overlying second free layer in a CPP cell such that when the second free layer is switched by a write current, the first free layer is also switched through a magnetic coupling interaction with the second free layer;
(b) a conductive spacer layer formed on the MTJ cell; and
(c) a CPP cell with a top electrode and formed on the conductive spacer wherein the CPP cell is comprised of a second free layer and a second synthetic pinned layer separated by a non-magnetic spacer, and said CPP cell has a substantial anisotropy, and said second free layer has a magnetization that is switched either by a write current flowing from a bit line contacting the top electrode through the CPP cell and then to the conductive spacer, or from the conductive spacer through the CPP cell and then to the bit line contacting the top electrode;
and wherein the MTJ cell and CPP cell in each sub-cell have a different resistance state, the two MTJ cells in each bit cell have different resistance states, and the two CPP cells in each bit cell have different resistance states.
2. The spin-transfer MRAM structure of claim 1 wherein the conductive spacer in the first sub-cell is connected to the conductive spacer in the second sub-cell through a write word line controlled by a write transistor.
3. The spin-transfer MRAM structure of claim 1 wherein the bottom electrode in each sub-cell is connected to ground through a read transistor.
4. The spin-transfer MRAM structure of claim 1 wherein the MTJ cell is a single spin valve and the CPP cell is a dual spin valve in a sub-cell.
5. The spin-transfer MRAM structure of claim 1 wherein the MTJ cell is a dual spin valve and the CPP cell is a single spin valve in a sub-cell.
6. The spin-transfer MRAM structure of claim 1 wherein the MTJ cell is a dual spin valve and the CPP cell is a dual spin valve in a sub-cell.